^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Freescale MPC512x and MPC8308 DMA Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) The DMA controller in Freescale MPC512x and MPC8308 SoCs can move
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) blocks of memory contents between memory and peripherals or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) from memory to memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Refer to "Generic DMA Controller and DMA request bindings" in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) the dma/dma.txt file for a more detailed description of binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - compatible: should be "fsl,mpc5121-dma" or "fsl,mpc8308-dma";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - reg: should contain the DMA controller registers location and length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - interrupt for the DMA controller: syntax of interrupt client node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) is described in interrupt-controller/interrupts.txt file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - #dma-cells: the length of the DMA specifier, must be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Each channel of this DMA controller has a peripheral request line,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) the assignment is fixed in hardware. This one cell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) in dmas property of a client device represents the channel number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) dma0: dma@14000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) compatible = "fsl,mpc5121-dma";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) reg = <0x14000 0x1800>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) interrupts = <65 0x8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #dma-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) DMA clients must use the format described in dma/dma.txt file.