Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Freescale MXS DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible : Should be "fsl,<chip>-dma-apbh" or "fsl,<chip>-dma-apbx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - reg : Should contain registers location and length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - interrupts : Should contain the interrupt numbers of DMA channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)   If a channel is empty/reserved, 0 should be filled in place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - #dma-cells : Must be <1>.  The number cell specifies the channel ID.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - dma-channels : Number of channels supported by the DMA controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - interrupt-names : Name of DMA channel interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Supported chips:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) imx23, imx28.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) dma_apbh: dma-apbh@80004000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	compatible = "fsl,imx28-dma-apbh";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	reg = <0x80004000 0x2000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	interrupts = <82 83 84 85
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		      88 88 88 88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		      88 88 88 88
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 		      87 86 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	interrupt-names = "ssp0", "ssp1", "ssp2", "ssp3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 			  "gpmi0", "gmpi1", "gpmi2", "gmpi3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 			  "gpmi4", "gmpi5", "gpmi6", "gmpi7",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 			  "hsadc", "lcdif", "empty", "empty";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	#dma-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	dma-channels = <16>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) dma_apbx: dma-apbx@80024000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	compatible = "fsl,imx28-dma-apbx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	reg = <0x80024000 0x2000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	interrupts = <78 79 66 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		      80 81 68 69
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		      70 71 72 73
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		      74 75 76 77>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	interrupt-names = "auart4-rx", "auart4-tx", "spdif-tx", "empty",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			  "saif0", "saif1", "i2c0", "i2c1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			  "auart0-rx", "auart0-tx", "auart1-rx", "auart1-tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 			  "auart2-rx", "auart2-tx", "auart3-rx", "auart3-tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	#dma-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	dma-channels = <16>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) DMA clients connected to the MXS DMA controller must use the format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) described in the dma.txt file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) auart0: serial@8006a000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	compatible = "fsl,imx28-auart", "fsl,imx23-auart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	reg = <0x8006a000 0x2000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	interrupts = <112>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	dmas = <&dma_apbx 8>, <&dma_apbx 9>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	dma-names = "rx", "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) };