^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/dma/dma-common.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: DMA Engine Generic Binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Vinod Koul <vkoul@kernel.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Generic binding to provide a way for a driver using DMA Engine to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) retrieve the DMA request or channel information that goes from a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) hardware device to a DMA controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) select: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) "#dma-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) minimum: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) # Should be enough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) maximum: 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Used to provide DMA controller specific information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) dma-channel-mask:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Bitmask of available DMA channels in ascending order that are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) not reserved by firmware and are available to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) kernel. i.e. first channel corresponds to LSB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) The first item in the array is for channels 0-31, the second is for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) channels 32-63, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) $ref: /schemas/types.yaml#/definitions/uint32-array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) minItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) # Should be enough
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) maxItems: 255
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) dma-channels:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) $ref: /schemas/types.yaml#definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Number of DMA channels supported by the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) dma-requests:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) $ref: /schemas/types.yaml#definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Number of DMA request signals supported by the controller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - "#dma-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) additionalProperties: true