Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * ARM PrimeCell PL330 DMA Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The ARM PrimeCell PL330 DMA controller can move blocks of memory contents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) between memory and peripherals or memory to memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)   - compatible: should include both "arm,pl330" and "arm,primecell".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)   - reg: physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)     region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - interrupts: interrupt number to the cpu.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   - dma-coherent      : Present if dma operations are coherent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   - #dma-cells: must be <1>. used to represent the number of integer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)     cells in the dmas property of client device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   - dma-channels: contains the total number of DMA channels supported by the DMAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   - dma-requests: contains the total number of DMA requests supported by the DMAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   - arm,pl330-broken-no-flushp: quirk for avoiding to execute DMAFLUSHP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   - arm,pl330-periph-burst: quirk for performing burst transfer only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)   - resets: contains an entry for each entry in reset-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	    See ../reset/reset.txt for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)   - reset-names: must contain at least "dma", and optional is "dma-ocp".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	pdma0: pdma@12680000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		compatible = "arm,pl330", "arm,primecell";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		reg = <0x12680000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		interrupts = <99>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		#dma-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		#dma-channels = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		#dma-requests = <32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) Client drivers (device nodes requiring dma transfers from dev-to-mem or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) mem-to-dev) should specify the DMA channel numbers and dma channel names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) as shown below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   [property name]  = <[phandle of the dma controller] [dma request id]>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)   [property name]  = <[dma channel name]>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)       where 'dma request id' is the dma request number which is connected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)       to the client controller. The 'property name' 'dmas' and 'dma-names'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)       as required by the generic dma device tree binding helpers. The dma
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)       names correspond 1:1 with the dma request ids in the dmas property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)   Example:  dmas = <&pdma0 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 		    &pdma1 11>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	    dma-names = "tx", "rx";