^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) MIPI DSI (Display Serial Interface) busses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ==========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) The MIPI Display Serial Interface specifies a serial bus and a protocol for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) communication between a host and up to four peripherals. This document will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) define the syntax used to represent a DSI bus in a device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) This document describes DSI bus-specific properties only or defines existing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) standard properties in the context of the DSI bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Each DSI host provides a DSI bus. The DSI host controller's node contains a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) set of properties that characterize the bus. Child nodes describe individual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) peripherals on that bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) The following assumes that only a single peripheral is connected to a DSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) host. Experience shows that this is true for the large majority of setups.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) DSI host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) In addition to the standard properties and those defined by the parent bus of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) a DSI host, the following properties apply to a node representing a DSI host.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - #address-cells: The number of cells required to represent an address on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) a maximum of 4 devices can be addressed on a single bus. Hence the value of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) this property should be 1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - #size-cells: Should be 0. There are cases where it makes sense to use a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) different value here. See below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - clock-master: boolean. Should be enabled if the host is being used in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) conjunction with another DSI host to drive the same peripheral. Hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) supporting such a configuration generally requires the data on both the busses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) to be driven by the same clock. Only the DSI host instance controlling this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) clock should contain this property.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) DSI peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ==============
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Peripherals with DSI as control bus, or no control bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Peripherals with the DSI bus as the primary control bus, or peripherals with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) no control bus but use the DSI bus to transmit pixel data are represented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) as child nodes of the DSI host's node. Properties described here apply to all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) DSI peripherals, but individual bindings may want to define additional,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) device-specific properties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - reg: The virtual channel number of a DSI peripheral. Must be in the range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) from 0 to 3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) Some DSI peripherals respond to more than a single virtual channel. In that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case two alternative representations can be chosen:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - The reg property can take multiple entries, one for each virtual channel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) that the peripheral responds to.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - If the virtual channels that a peripheral responds to are consecutive, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #size-cells can be set to 1. The first cell of each entry in the reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) property is the number of the first virtual channel and the second cell is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) the number of consecutive virtual channels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) Peripherals with a different control bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ----------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) There are peripherals that have I2C/SPI (or some other non-DSI bus) as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) primary control bus, but are also connected to a DSI bus (mostly for the data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) path). Connections between such peripherals and a DSI host can be represented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) using the graph bindings [1], [2].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) Peripherals that support dual channel DSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) -----------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) Peripherals with higher bandwidth requirements can be connected to 2 DSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) busses. Each DSI bus/channel drives some portion of the pixel data (generally
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) left/right half of each line of the display, or even/odd lines of the display).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) The graph bindings should be used to represent the multiple DSI busses that are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) connected to this peripheral. Each DSI host's output endpoint can be linked to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) an input endpoint of the DSI peripheral.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) [1] Documentation/devicetree/bindings/graph.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) [2] Documentation/devicetree/bindings/media/video-interfaces.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) Examples
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) ========
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - (1), (2) and (3) are examples of a DSI host and peripheral on the DSI bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) with different virtual channel configurations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) - (4) is an example of a peripheral on a I2C control bus connected to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) DSI host using of-graph bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) - (5) is an example of 2 DSI hosts driving a dual-channel DSI peripheral,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) which uses I2C as its primary control bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) dsi-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /* peripheral responds to virtual channel 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) peripheral@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) compatible = "...";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) dsi-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* peripheral responds to virtual channels 0 and 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) peripheral@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) compatible = "...";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) reg = <0, 2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) dsi-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* peripheral responds to virtual channels 1, 2 and 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) peripheral@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) compatible = "...";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) reg = <1 3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) i2c-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) dsi-bridge@35 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) compatible = "...";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) reg = <0x35>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) bridge_mipi_in: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) remote-endpoint = <&host_mipi_out>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) dsi-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) host_mipi_out: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) remote-endpoint = <&bridge_mipi_in>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) i2c-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) dsi-bridge@35 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) compatible = "...";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) reg = <0x35>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) port@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) dsi0_in: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) remote-endpoint = <&dsi0_out>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) port@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) dsi1_in: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) remote-endpoint = <&dsi1_out>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) dsi0-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * this DSI instance drives the clock for both the host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * controllers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) clock-master;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) dsi0_out: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) remote-endpoint = <&dsi0_in>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) dsi1-host {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ports {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) port {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) dsi1_out: endpoint {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) remote-endpoint = <&dsi1_in>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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