^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * LPDDR3 SDRAM memories compliant to JEDEC JESD209-3C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible : Should be "<vendor>,<type>", and generic value "jedec,lpddr3".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Example "<vendor>,<type>" values:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) "samsung,K3QF2F20DB"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) - density : <u32> representing density in Mb (Mega bits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - io-width : <u32> representing bus width. Possible values are 8, 16, 32, 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - #address-cells: Must be set to 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #size-cells: Must be set to 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) The following optional properties represent the minimum value of some AC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) timing parameters of the DDR device in terms of number of clock cycles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) These values shall be obtained from the device data-sheet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - tRFC-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - tRRD-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - tRPab-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - tRPpb-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - tRCD-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - tRC-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - tRAS-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - tWTR-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - tWR-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - tRTP-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - tW2W-C2C-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - tR2R-C2C-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - tWL-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - tDQSCK-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - tRL-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) - tFAW-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - tXSR-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - tXP-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - tCKE-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - tCKESR-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - tMRD-min-tck
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Child nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - The lpddr3 node may have one or more child nodes of type "lpddr3-timings".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) "lpddr3-timings" provides AC timing parameters of the device for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) a given speed-bin. Please see Documentation/devicetree/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) bindings/ddr/lpddr3-timings.txt for more information on "lpddr3-timings"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) samsung_K3QF2F20DB: lpddr3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) compatible = "samsung,K3QF2F20DB", "jedec,lpddr3";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) density = <16384>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) io-width = <32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) tRFC-min-tck = <17>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) tRRD-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) tRPab-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) tRPpb-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) tRCD-min-tck = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) tRC-min-tck = <6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) tRAS-min-tck = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) tWTR-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) tWR-min-tck = <7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) tRTP-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) tW2W-C2C-min-tck = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) tR2R-C2C-min-tck = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) tWL-min-tck = <8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) tDQSCK-min-tck = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) tRL-min-tck = <14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) tFAW-min-tck = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) tXSR-min-tck = <12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) tXP-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) tCKE-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) tCKESR-min-tck = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) tMRD-min-tck = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) timings_samsung_K3QF2F20DB_800mhz: lpddr3-timings@800000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) compatible = "jedec,lpddr3-timings";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* workaround: 'reg' shows max-freq */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) reg = <800000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) min-freq = <100000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) tRFC = <65000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) tRRD = <6000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) tRPab = <12000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) tRPpb = <12000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) tRCD = <10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) tRC = <33750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) tRAS = <23000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) tWTR = <3750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) tWR = <7500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) tRTP = <3750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) tW2W-C2C = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) tR2R-C2C = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) tFAW = <25000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) tXSR = <70000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) tXP = <3750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) tCKE = <3750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) tCKESR = <3750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) tMRD = <7000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }