Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * AC timing parameters of LPDDR2(JESD209-2) memories for a given speed-bin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible : Should be "jedec,lpddr2-timings"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - min-freq : minimum DDR clock frequency for the speed-bin. Type is <u32>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - max-freq : maximum DDR clock frequency for the speed-bin. Type is <u32>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) The following properties represent AC timing parameters from the memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) data-sheet of the device for a given speed-bin. All these properties are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) of type <u32> and the default unit is ps (pico seconds). Parameters with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) a different unit have a suffix indicating the unit such as 'tRAS-max-ns'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - tRCD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - tWR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - tRAS-min
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - tRRD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) - tWTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - tXP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - tRTP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - tDQSCK-max
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - tFAW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - tZQCS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - tZQinit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - tRPab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - tZQCL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - tCKESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - tRAS-max-ns
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - tDQSCK-max-derated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) timings_elpida_ECB240ABACN_400mhz: lpddr2-timings@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	compatible	= "jedec,lpddr2-timings";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	min-freq	= <10000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	max-freq	= <400000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	tRPab		= <21000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	tRCD		= <18000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	tWR		= <15000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	tRAS-min	= <42000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	tRRD		= <10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	tWTR		= <7500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	tXP		= <7500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	tRTP		= <7500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	tCKESR		= <15000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	tDQSCK-max	= <5500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	tFAW		= <50000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	tZQCS		= <90000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	tZQCL		= <360000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	tZQinit		= <1000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	tRAS-max-ns	= <70000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };