Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Qualcomm crypto engine driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible  : should be "qcom,crypto-v5.1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg         : specifies base physical address and size of the registers map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - clocks      : phandle to clock-controller plus clock-specifier pair
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - clock-names : "iface" clocks register interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)                 "bus" clocks data transfer interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)                 "core" clocks rest of the crypto block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - dmas        : DMA specifiers for tx and rx dma channels. For more see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)                 Documentation/devicetree/bindings/dma/dma.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - dma-names   : DMA request names should be "rx" and "tx"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	crypto@fd45a000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		compatible = "qcom,crypto-v5.1";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		reg = <0xfd45a000 0x6000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		clocks = <&gcc GCC_CE2_AHB_CLK>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 			 <&gcc GCC_CE2_AXI_CLK>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 			 <&gcc GCC_CE2_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		clock-names = "iface", "bus", "core";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		dmas = <&cryptobam 2>, <&cryptobam 3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		dma-names = "rx", "tx";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	};