Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Inside Secure SafeXcel cryptographic engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: Should be "inside-secure,safexcel-eip197b",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 	      "inside-secure,safexcel-eip197d" or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)               "inside-secure,safexcel-eip97ies".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - reg: Base physical address of the engine and length of memory mapped region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - interrupts: Interrupt numbers for the rings and engine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - interrupt-names: Should be "ring0", "ring1", "ring2", "ring3", "eip", "mem".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - clocks: Reference to the crypto engine clocks, the second clock is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)           needed for the Armada 7K/8K SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - clock-names: mandatory if there is a second clock, in this case the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)                name must be "core" for the first clock and "reg" for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)                the second one.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Backward compatibility:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Two compatibles are kept for backward compatibility, but shouldn't be used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) new submissions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - "inside-secure,safexcel-eip197" is equivalent to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)   "inside-secure,safexcel-eip197b".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - "inside-secure,safexcel-eip97" is equivalent to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   "inside-secure,safexcel-eip97ies".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	crypto: crypto@800000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		compatible = "inside-secure,safexcel-eip197b";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		reg = <0x800000 0x200000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 			     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 			     <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 			     <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 			     <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		interrupt-names = "mem", "ring0", "ring1", "ring2", "ring3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 				  "eip";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		clocks = <&cpm_syscon0 1 26>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	};