^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Currently Freescale powerpc chip C29X is embedded with SEC 6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) SEC 6 device tree binding include:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) -SEC 6 Node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) -Job Ring Node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) -Full Example
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) =====================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) SEC 6 Node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Node defines the base address of the SEC 6 block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) This block specifies the address range of all global
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) configuration registers for the SEC 6 block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) For example, In C293, we could see three SEC 6 node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) PROPERTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Value type: <string>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Definition: Must include "fsl,sec-v6.0".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - fsl,sec-era
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Usage: optional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Value type: <u32>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Definition: A standard property. Define the 'ERA' of the SEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - #address-cells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) Value type: <u32>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Definition: A standard property. Defines the number of cells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) for representing physical addresses in child nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - #size-cells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) Value type: <u32>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) Definition: A standard property. Defines the number of cells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) for representing the size of physical addresses in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) child nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) Value type: <prop-encoded-array>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Definition: A standard property. Specifies the physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) address and length of the SEC 6 configuration registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - ranges
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) Value type: <prop-encoded-array>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) Definition: A standard property. Specifies the physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) range of the SEC 6.0 register space (-SNVS not included). A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) triplet that includes the child address, parent address, &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) length.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) Note: All other standard properties (see the Devicetree Specification)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) are allowed but are optional.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) EXAMPLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) crypto@a0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) compatible = "fsl,sec-v6.0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) fsl,sec-era = <6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) reg = <0xa0000 0x20000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) ranges = <0 0xa0000 0x20000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) =====================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) Job Ring (JR) Node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) Child of the crypto node defines data processing interface to SEC 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) across the peripheral bus for purposes of processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) cryptographic descriptors. The specified address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) range can be made visible to one (or more) cores.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) The interrupt defined for this node is controlled within
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) the address range of this node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) Value type: <string>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) Definition: Must include "fsl,sec-v6.0-job-ring".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) Value type: <prop-encoded-array>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) Definition: Specifies a two JR parameters: an offset from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) the parent physical address and the length the JR registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) Value type: <prop_encoded-array>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) Definition: Specifies the interrupts generated by this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) device. The value of the interrupts property
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) consists of one interrupt specifier. The format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) of the specifier is defined by the binding document
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) describing the node's interrupt parent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) EXAMPLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) jr@1000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) compatible = "fsl,sec-v6.0-job-ring";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) reg = <0x1000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) interrupts = <49 2 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) ===================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) Full Example
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) Since some chips may contain more than one SEC, the dtsi contains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) only the node contents, not the node itself. A chip using the SEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) should include the dtsi inside each SEC node. Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) In qoriq-sec6.0.dtsi:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) compatible = "fsl,sec-v6.0";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) fsl,sec-era = <6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #size-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) jr@1000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) compatible = "fsl,sec-v6.0-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) "fsl,sec-v5.2-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) "fsl,sec-v5.0-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) "fsl,sec-v4.4-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) "fsl,sec-v4.0-job-ring";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) reg = <0x1000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) jr@2000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) compatible = "fsl,sec-v6.0-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) "fsl,sec-v5.2-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) "fsl,sec-v5.0-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) "fsl,sec-v4.4-job-ring",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) "fsl,sec-v4.0-job-ring";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) reg = <0x2000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) In the C293 device tree, we add the include of public property:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) crypto@a0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /include/ "qoriq-sec6.0.dtsi"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) crypto@a0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) reg = <0xa0000 0x20000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ranges = <0 0xa0000 0x20000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) jr@1000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) interrupts = <49 2 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) jr@2000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) interrupts = <50 2 0 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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