^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Binding for Rockchip's CPUFreq driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ===============================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Rockchip's CPUFreq driver attempts to read leakage value from eFuse
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) and get frequency count from pvtm, then supplies the OPP framework
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) with 'prop' information which is used to determine opp-microvolt-<name>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) property of OPPS when it is parsed by the OPP framework. This is based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) on operating-points-v2, but the driver can also create the "cpufreq-dt"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) platform_device to compatibility with operating-points.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) For more information about the expected DT format [See: ../opp/opp.txt].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) In 'operating-points-v2' table:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - rockchip,leakage-voltage-sel: The property is an array of 3-tuples items, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) each item consists of leakage and voltage selector like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) <min-leakage max-leakage volt-selector>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) min-leakage: minimum leakage in mA, ranges from 1 to 254.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) max-leakage: maximum leakage in mA, ranges from 1 to 254.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) voltage-selector: a sequence number which is used to math
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) opp-microvolt-L<number> roperty in OPP node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - rockchip,pvtm-voltage-sel: The property is an array of 3-tuples items, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) each item consists of pvtm and voltage selector like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) <min-pvtm max-pvtm volt-selector>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) min-pvtm: minimum frequency count in KHz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) max-pvtm: maximum frequency count in KHz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) voltage-selector: a sequence number which is used to math
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) opp-microvolt-L<number> roperty in OPP node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - rockchip,pvtm-freq: Clock frequency in KHz, which is used to set the cpu clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) frequency before get frequency count of pvtm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - rockchip,pvtm-volt: Voltage in uV, which is used to set the cpu voltage before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) get frequency count of pvtm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - rockchip,pvtm-ch: An array of two integers containing pvtm channel and clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) oscillation ring.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - rockchip,pvtm-sample-time: The number of milliseconds to wait for pvtm to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) finish counting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - rockchip,pvtm-number: An integer indicating the number of sampling points.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - rockchip,pvtm-error: An integer indicating the error between the sample
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) results.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - rockchip,pvtm-ref-temp: The SoC internal temperature in degree centigrade, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) min-pvtm and max-pvtm in 'leakage-voltage-sel' are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) measured at reference temperature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - rockchip,pvtm-temp-prop: An array of two integers containing proportional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) constants which is used to convert the value at current
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) temperature to reference temperature. The first one is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) used when current temperature is below reference
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) temperature. Conversely, The second one is used when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) current temperature is above reference temperature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - rockchip,pvtm-thermal-zone: A thermal zone node containing thermal sensor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) it's used to get the current temperature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - rockchip,thermal-zone: A thermal zone node containing thermal sensor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) it's used to get the current temperature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - nvmem-cells: A phandle to cpu_leakage data provided by a nvmem device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - nvmem-cell-names: Should be "cpu_leakage"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - rockchip,threshold-freq: Clock frequency in KHz, it's used to reduce power
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) for SoCs with two clusters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) - rockchip,freq-limit: Only one cluster can contain the property, and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) cluster's maximum frequency will be limited to its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) threshold frequency, if the other cluster's frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) is geater than or equal to its threshold frequency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) cpus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) cpu@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) operating-points-v2 = <&cluster0_opp>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) cluster0_opp: opp_table0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) compatible = "operating-points-v2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) opp-shared;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) rockchip,leakage-voltage-sel = <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 1 24 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 25 254 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) nvmem-cells = <&cpu_leakage>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) nvmem-cell-names = "cpu_leakage";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) opp@216000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) opp-hz = /bits/ 64 <216000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) opp-microvolt = <950000 950000 1350000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) opp-microvolt-L0 = <1050000 1050000 1350000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) opp-microvolt-L1 = <950000 950000 1350000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) opp-suspend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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