Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Generic cpufreq driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) It is a generic DT based cpufreq driver for frequency management.  It supports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) both uniprocessor (UP) and symmetric multiprocessor (SMP) systems which share
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) clock and voltage across all CPUs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) Both required and optional properties listed below must be defined
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) under node /cpus/cpu@0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - operating-points: Refer to Documentation/devicetree/bindings/opp/opp.txt for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   details. OPPs *must* be supplied either via DT, i.e. this property, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   populated at runtime.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - clock-latency: Specify the possible maximum transition latency for clock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   in unit of nanoseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - voltage-tolerance: Specify the CPU voltage tolerance in percentage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - #cooling-cells:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)      Please refer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)      Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) cpus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	cpu@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		compatible = "arm,cortex-a9";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		next-level-cache = <&L2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		operating-points = <
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			/* kHz    uV */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 			792000  1100000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 			396000  950000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 			198000  850000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		clock-latency = <61036>; /* two CLK32 periods */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		#cooling-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	cpu@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		compatible = "arm,cortex-a9";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		next-level-cache = <&L2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	cpu@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		compatible = "arm,cortex-a9";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 		reg = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		next-level-cache = <&L2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	cpu@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 		compatible = "arm,cortex-a9";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 		reg = <3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		next-level-cache = <&L2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) };