^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) CPU topology binding description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) 1 - Introduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) In a SMP system, the hierarchy of CPUs is defined through three entities that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) are used to describe the layout of physical CPUs in the system:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - socket
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - cluster
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - thread
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) The bottom hierarchy level sits at core or thread level depending on whether
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) symmetric multi-threading (SMT) is supported or not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) For instance in a system where CPUs support SMT, "cpu" nodes represent all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) threads existing in the system and map to the hierarchy level "thread" above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) In systems where SMT is not supported "cpu" nodes represent all cores present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) in the system and map to the hierarchy level "core" above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) CPU topology bindings allow one to associate cpu nodes with hierarchical groups
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) corresponding to the system hierarchy; syntactically they are defined as device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) tree nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) used for any other architecture as well.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) The cpu nodes, as per bindings defined in [4], represent the devices that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) correspond to physical CPUs and are to be mapped to the hierarchy levels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) A topology description containing phandles to cpu nodes that are not compliant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) with bindings standardized in [4] is therefore considered invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 2 - cpu-map node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) child of the cpus node and provides a container where the actual topology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) nodes are listed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - cpu-map node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Usage: Optional - On SMP systems provide CPUs topology to the OS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Uniprocessor systems do not require a topology
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) description and therefore should not define a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) cpu-map node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) Description: The cpu-map node is just a container node where its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) subnodes describe the CPU topology.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) Node name must be "cpu-map".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) The cpu-map node's parent node must be the cpus node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) The cpu-map node's child nodes can be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) - one or more cluster nodes or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) - one or more socket nodes in a multi-socket system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Any other configuration is considered invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) The cpu-map node can only contain 4 types of child nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) - socket node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) - cluster node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) - core node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) - thread node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) whose bindings are described in paragraph 3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) The nodes describing the CPU topology (socket/cluster/core/thread) can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) only be defined within the cpu-map node and every core/thread in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) system must be defined within the topology. Any other configuration is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) invalid and therefore must be ignored.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 2.1 - cpu-map child nodes naming convention
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) cpu-map child nodes must follow a naming convention where the node name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) must be "socketN", "clusterN", "coreN", "threadN" depending on the node type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) (ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) which are siblings within a single common parent node must be given a unique and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) sequential N value, starting from 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) cpu-map child nodes which do not share a common parent node can have the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) name (ie same number N as other cpu-map child nodes at different device tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) levels) since name uniqueness will be guaranteed by the device tree hierarchy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 3 - socket/cluster/core/thread node bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) Bindings for socket/cluster/cpu/thread nodes are defined as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) - socket node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) Description: must be declared within a cpu-map node, one node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) per physical socket in the system. A system can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) contain single or multiple physical socket.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) The association of sockets and NUMA nodes is beyond
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) the scope of this bindings, please refer [2] for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) NUMA bindings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) This node is optional for a single socket system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) The socket node name must be "socketN" as described in 2.1 above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) A socket node can not be a leaf node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) A socket node's child nodes must be one or more cluster nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) Any other configuration is considered invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) - cluster node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Description: must be declared within a cpu-map node, one node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) per cluster. A system can contain several layers of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) clustering within a single physical socket and cluster
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) nodes can be contained in parent cluster nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) The cluster node name must be "clusterN" as described in 2.1 above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) A cluster node can not be a leaf node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) A cluster node's child nodes must be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) - one or more cluster nodes; or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) - one or more core nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) Any other configuration is considered invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) - core node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) Description: must be declared in a cluster node, one node per core in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) the cluster. If the system does not support SMT, core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) nodes are leaf nodes, otherwise they become containers of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) thread nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) The core node name must be "coreN" as described in 2.1 above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) A core node must be a leaf node if SMT is not supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) Properties for core nodes that are leaf nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) - cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) Value type: <phandle>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) Definition: a phandle to the cpu node that corresponds to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) core node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) If a core node is not a leaf node (CPUs supporting SMT) a core node's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) child nodes can be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) - one or more thread nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) Any other configuration is considered invalid.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) - thread node
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) Description: must be declared in a core node, one node per thread
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) in the core if the system supports SMT. Thread nodes are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) always leaf nodes in the device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) The thread node name must be "threadN" as described in 2.1 above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) A thread node must be a leaf node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) A thread node must contain the following property:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) - cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) Usage: required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) Value type: <phandle>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) Definition: a phandle to the cpu node that corresponds to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) the thread node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 4 - Example dts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ===========================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters in a single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) physical socket):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) cpus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #address-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) cpu-map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) socket0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) cluster0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) cluster0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) core0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) cpu = <&CPU0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) cpu = <&CPU1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) core1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) cpu = <&CPU2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) cpu = <&CPU3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) cluster1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) core0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) cpu = <&CPU4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) cpu = <&CPU5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) core1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) cpu = <&CPU6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) cpu = <&CPU7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) cluster1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) cluster0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) core0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) cpu = <&CPU8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) cpu = <&CPU9>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) core1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) cpu = <&CPU10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) cpu = <&CPU11>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) cluster1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) core0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) cpu = <&CPU12>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) cpu = <&CPU13>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) core1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) thread0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) cpu = <&CPU14>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) thread1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) cpu = <&CPU15>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) CPU0: cpu@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) reg = <0x0 0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) CPU1: cpu@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) reg = <0x0 0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) CPU2: cpu@100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) reg = <0x0 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) CPU3: cpu@101 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) reg = <0x0 0x101>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) CPU4: cpu@10000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) reg = <0x0 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) CPU5: cpu@10001 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) reg = <0x0 0x10001>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) CPU6: cpu@10100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) reg = <0x0 0x10100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) CPU7: cpu@10101 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) reg = <0x0 0x10101>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) CPU8: cpu@100000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) reg = <0x1 0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) CPU9: cpu@100000001 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) reg = <0x1 0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) CPU10: cpu@100000100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) reg = <0x1 0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) CPU11: cpu@100000101 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) reg = <0x1 0x101>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) CPU12: cpu@100010000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) reg = <0x1 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) CPU13: cpu@100010001 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) reg = <0x1 0x10001>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) CPU14: cpu@100010100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) reg = <0x1 0x10100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) CPU15: cpu@100010101 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) compatible = "arm,cortex-a57";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) reg = <0x1 0x10101>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) enable-method = "spin-table";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) cpu-release-addr = <0 0x20000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) cpus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) cpu-map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) cluster0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) core0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) cpu = <&CPU0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) core1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) cpu = <&CPU1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) core2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) cpu = <&CPU2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) core3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) cpu = <&CPU3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) cluster1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) core0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) cpu = <&CPU4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) core1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) cpu = <&CPU5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) core2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) cpu = <&CPU6>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) core3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) cpu = <&CPU7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) CPU0: cpu@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) compatible = "arm,cortex-a15";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) reg = <0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) CPU1: cpu@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) compatible = "arm,cortex-a15";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) reg = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) CPU2: cpu@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) compatible = "arm,cortex-a15";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) reg = <0x2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) CPU3: cpu@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) compatible = "arm,cortex-a15";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) reg = <0x3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) CPU4: cpu@100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) compatible = "arm,cortex-a7";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) reg = <0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) CPU5: cpu@101 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) compatible = "arm,cortex-a7";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) reg = <0x101>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) CPU6: cpu@102 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) compatible = "arm,cortex-a7";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) reg = <0x102>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) CPU7: cpu@103 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) compatible = "arm,cortex-a7";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) reg = <0x103>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) Example 3: HiFive Unleashed (RISC-V 64 bit, 4 core system)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #address-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) #size-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) compatible = "sifive,fu540g", "sifive,fu500";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) model = "sifive,hifive-unleashed-a00";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) cpus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) cpu-map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) socket0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) cluster0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) core0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) cpu = <&CPU1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) core1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) cpu = <&CPU2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) core2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) cpu0 = <&CPU2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) core3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) cpu0 = <&CPU3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) CPU1: cpu@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) compatible = "sifive,rocket0", "riscv";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) reg = <0x1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) CPU2: cpu@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) compatible = "sifive,rocket0", "riscv";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) reg = <0x2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) CPU3: cpu@3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) compatible = "sifive,rocket0", "riscv";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) reg = <0x3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) CPU4: cpu@4 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) device_type = "cpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) compatible = "sifive,rocket0", "riscv";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) reg = <0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) ===============================================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) [1] ARM Linux kernel documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) Documentation/devicetree/bindings/arm/cpus.yaml
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) [2] Devicetree NUMA binding description
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) Documentation/devicetree/bindings/numa.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) [3] RISC-V Linux kernel documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) Documentation/devicetree/bindings/riscv/cpus.yaml
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) [4] https://www.devicetree.org/specifications/
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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