Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Device tree bindings for Texas Instruments keystone pll controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The main pll controller used to drive theC66x CorePacs, the switch fabric,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) and a majority of the peripheral clocks (all but the ARM CorePacs, DDR3 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) the NETCP modules) requires a PLL Controller to manage the various clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) divisions, gating, and synchronization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible:		"ti,keystone-pllctrl", "syscon"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - reg:			contains offset/length value for pll controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 			registers space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) pllctrl: pll-controller@02310000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	compatible = "ti,keystone-pllctrl", "syscon";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	reg = <0x02310000 0x200>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) };