^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Binding for an external clock signal driven by a PWM pin.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) This binding uses the common clock binding[1] and the common PWM binding[2].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) [2] Documentation/devicetree/bindings/pwm/pwm.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) - compatible : shall be "pwm-clock".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - #clock-cells : from common clock binding; shall be set to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - pwms : from common PWM binding; this determines the clock frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) via the period given in the PWM specifier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - clock-output-names : From common clock binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - clock-frequency : Exact output frequency, in case the PWM period
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) is not exact but was rounded to nanoseconds.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) clock {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) compatible = "pwm-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) clock-frequency = <25000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) clock-output-names = "mipi_mclk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) pwms = <&pwm2 0 40>; /* 1 / 40 ns = 25 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };