Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) TI-NSPIRE Clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) - compatible: Valid compatible properties include:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 	"lsi,nspire-cx-ahb-divider" for the AHB divider in the CX model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	"lsi,nspire-classic-ahb-divider" for the AHB divider in the older model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	"lsi,nspire-cx-clock" for the base clock in the CX model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	"lsi,nspire-classic-clock" for the base clock in the older model
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - reg: Physical base address of the controller and length of memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - clocks: For the "nspire-*-ahb-divider" compatible clocks, this is the parent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	clock where it divides the rate from.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ahb_clk {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	#clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	compatible = "lsi,nspire-cx-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	reg = <0x900B0000 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	clocks = <&base_clk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };