^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Gated Clock bindings for Marvell EBU SoCs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Marvell Armada 370/375/380/385/39x/XP, Dove and Kirkwood allow some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) peripheral clocks to be gated to save some power. The clock consumer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) should specify the desired clock by having the clock ID in its
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) "clocks" phandle cell. The clock ID is directly mapped to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) corresponding clock gating control bit in HW to ease manual clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) lookup in datasheet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) The following is a list of provided IDs for Armada 370:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 0 Audio AC97 Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 1 pex0_en PCIe 0 Clock out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 2 pex1_en PCIe 1 Clock out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 3 ge1 Gigabit Ethernet 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 4 ge0 Gigabit Ethernet 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 5 pex0 PCIe Cntrl 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 9 pex1 PCIe Cntrl 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 15 sata0 SATA Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 17 sdio SDHCI Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 23 crypto CESA (crypto engine)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 25 tdm Time Division Mplx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 28 ddr DDR Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 30 sata1 SATA Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) The following is a list of provided IDs for Armada 375:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 2 mu Management Unit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 3 pp Packet Processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 4 ptp PTP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 5 pex0 PCIe 0 Clock out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 6 pex1 PCIe 1 Clock out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 8 audio Audio Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 11 nd_clk Nand Flash Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 14 sata0_link SATA 0 Link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 15 sata0_core SATA 0 Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 16 usb3 USB3 Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 17 sdio SDHCI Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 18 usb USB Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 19 gop Gigabit Ethernet MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 20 sata1_link SATA 1 Link
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 21 sata1_core SATA 1 Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 22 xor0 XOR DMA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 23 xor1 XOR DMA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 24 copro Coprocessor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 25 tdm Time Division Mplx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 28 crypto0_enc Cryptographic Unit Port 0 Encryption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 29 crypto0_core Cryptographic Unit Port 0 Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 30 crypto1_enc Cryptographic Unit Port 1 Encryption
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 31 crypto1_core Cryptographic Unit Port 1 Core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) The following is a list of provided IDs for Armada 380/385:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 0 audio Audio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 2 ge2 Gigabit Ethernet 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 3 ge1 Gigabit Ethernet 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 4 ge0 Gigabit Ethernet 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 5 pex1 PCIe 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 6 pex2 PCIe 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 7 pex3 PCIe 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 8 pex0 PCIe 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 9 usb3h0 USB3 Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 10 usb3h1 USB3 Host 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 11 usb3d USB3 Device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 13 bm Buffer Management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 14 crypto0z Cryptographic 0 Z
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 15 sata0 SATA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 16 crypto1z Cryptographic 1 Z
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 17 sdio SDIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 18 usb2 USB 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 21 crypto1 Cryptographic 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 22 xor0 XOR 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 23 crypto0 Cryptographic 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 25 tdm Time Division Multiplexing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 28 xor1 XOR 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 30 sata1 SATA 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) The following is a list of provided IDs for Armada 39x:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 5 pex1 PCIe 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 6 pex2 PCIe 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 7 pex3 PCIe 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 8 pex0 PCIe 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 9 usb3h0 USB3 Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 10 usb3h1 USB3 Host 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 15 sata0 SATA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 17 sdio SDIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 22 xor0 XOR 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 28 xor1 XOR 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) The following is a list of provided IDs for Armada XP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) 0 audio Audio Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 1 ge3 Gigabit Ethernet 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 2 ge2 Gigabit Ethernet 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 3 ge1 Gigabit Ethernet 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 4 ge0 Gigabit Ethernet 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 5 pex0 PCIe Cntrl 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 6 pex1 PCIe Cntrl 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 7 pex2 PCIe Cntrl 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 8 pex3 PCIe Cntrl 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 13 bp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 14 sata0lnk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 15 sata0 SATA Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 16 lcd LCD Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 17 sdio SDHCI Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 18 usb0 USB Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 19 usb1 USB Host 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 20 usb2 USB Host 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 22 xor0 XOR DMA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 23 crypto CESA engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 25 tdm Time Division Mplx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 28 xor1 XOR DMA 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 29 sata1lnk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 30 sata1 SATA Host 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) The following is a list of provided IDs for 98dx3236:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 3 ge1 Gigabit Ethernet 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 4 ge0 Gigabit Ethernet 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 5 pex0 PCIe Cntrl 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 17 sdio SDHCI Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 18 usb0 USB Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 22 xor0 XOR DMA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) The following is a list of provided IDs for Dove:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 0 usb0 USB Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 1 usb1 USB Host 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 2 ge Gigabit Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 3 sata SATA Host
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 4 pex0 PCIe Cntrl 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 5 pex1 PCIe Cntrl 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 8 sdio0 SDHCI Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 9 sdio1 SDHCI Host 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 10 nand NAND Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 11 camera Camera Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 12 i2s0 I2S Cntrl 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 13 i2s1 I2S Cntrl 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 15 crypto CESA engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 21 ac97 AC97 Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 22 pdma Peripheral DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 23 xor0 XOR DMA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 24 xor1 XOR DMA 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 30 gephy Gigabit Ethernel PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) Note: gephy(30) is implemented as a parent clock of ge(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) The following is a list of provided IDs for Kirkwood:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) ID Clock Peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) -----------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 0 ge0 Gigabit Ethernet 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 2 pex0 PCIe Cntrl 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 3 usb0 USB Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 4 sdio SDIO Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 5 tsu Transp. Stream Unit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 6 dunit SDRAM Cntrl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 7 runit Runit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 8 xor0 XOR DMA 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 9 audio I2S Cntrl 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 14 sata0 SATA Host 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 15 sata1 SATA Host 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 16 xor1 XOR DMA 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 17 crypto CESA engine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 18 pex1 PCIe Cntrl 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 19 ge1 Gigabit Ethernet 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 20 tdm Time Division Mplx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) - compatible : shall be one of the following:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) "marvell,dove-gating-clock" - for Dove SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) - reg : shall be the register address of the Clock Gating Control register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) - #clock-cells : from common clock binding; shall be set to 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) - clocks : default parent clock phandle (e.g. tclk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) gate_clk: clock-gating-control@d0038 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) compatible = "marvell,dove-gating-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) reg = <0xd0038 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* default parent clock is tclk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) clocks = <&core_clk 0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) sdio0: sdio@92000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) compatible = "marvell,dove-sdhci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* get clk gate bit 8 (sdio0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) clocks = <&gate_clk 8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) };