^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: NXP i.MX8M Family Clock Control Module Binding
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Anson Huang <Anson.Huang@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) controller, which generates and supplies to all modules.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - fsl,imx8mm-ccm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - fsl,imx8mn-ccm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - fsl,imx8mp-ccm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - fsl,imx8mq-ccm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) minItems: 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) maxItems: 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) minItems: 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) maxItems: 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) '#clock-cells':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) The clock consumer should specify the desired clock by having the clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) for the full list of i.MX8M clock IDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - clock-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - '#clock-cells'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) allOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) - if:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) const: fsl,imx8mq-ccm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) then:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) minItems: 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) maxItems: 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) - description: 32k osc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) - description: 25m osc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) - description: 27m osc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) - description: ext1 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - description: ext2 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) - description: ext3 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - description: ext4 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) minItems: 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) maxItems: 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) - const: ckil
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - const: osc_25m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) - const: osc_27m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) - const: clk_ext1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) - const: clk_ext2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) - const: clk_ext3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) - const: clk_ext4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) else:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) - description: 32k osc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) - description: 24m osc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) - description: ext1 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) - description: ext2 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - description: ext3 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) - description: ext4 clock input
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) - const: osc_32k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) - const: osc_24m
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) - const: clk_ext1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) - const: clk_ext2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) - const: clk_ext3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) - const: clk_ext4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) # Clock Control Module node:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) clock-controller@30380000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) compatible = "fsl,imx8mm-ccm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) reg = <0x30380000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) <&clk_ext3>, <&clk_ext4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) "clk_ext3", "clk_ext4";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) clock-controller@30390000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) compatible = "fsl,imx8mq-ccm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) reg = <0x30380000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) "clk_ext2", "clk_ext3", "clk_ext4";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ...
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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