Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/clock/imx27-clock.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Clock bindings for Freescale i.MX27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - Fabio Estevam <fabio.estevam@nxp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   The clock consumer should specify the desired clock by having the clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)   for the full list of i.MX27 clock IDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)     const: fsl,imx27-ccm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)   '#clock-cells':
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)     const: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)   - '#clock-cells'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)     #include <dt-bindings/clock/imx27-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)     clock-controller@10027000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)         compatible = "fsl,imx27-ccm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)         reg = <0x10027000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)         interrupts = <31>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)         #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)     };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)     serial@1000a000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)         compatible = "fsl,imx27-uart", "fsl,imx21-uart";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)         reg = <0x1000a000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)         interrupts = <20>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)         clocks = <&clks IMX27_CLK_UART1_IPG_GATE>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)                  <&clks IMX27_CLK_PER1_GATE>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)         clock-names = "ipg", "per";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)     };