Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Binding for simple memory mapped io fixed-rate clock sources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) The driver reads a clock frequency value from a single 32-bit memory mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) I/O register and registers it as a fixed rate clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) It was designed for test systems, like FPGA, not for complete, finished SoCs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) This binding uses the common clock binding[1].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - compatible : shall be "fixed-mmio-clock".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - #clock-cells : from common clock binding; shall be set to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - reg : Address and length of the clock value register set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) - clock-output-names : From common clock binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) sysclock: sysclock@fd020004 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	#clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	compatible = "fixed-mmio-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	reg = <0xfd020004 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };