Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) CIRRUS LOGIC Fractional-N Clock Synthesizer & Clock Multiplier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) - compatible:		"cirrus,cs2000-cp"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) - reg:			The chip select number on the I2C bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - clocks:		common clock binding for CLK_IN, XTI/REF_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - clock-names:		CLK_IN : clk_in, XTI/REF_CLK : ref_clk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - #clock-cells:		must be <0>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) &i2c2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	cs2000: clk_multiplier@4f {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		#clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		compatible = "cirrus,cs2000-cp";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		reg = <0x4f>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		clocks = <&rcar_sound 0>, <&x12_clk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		clock-names = "clk_in", "ref_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) };