^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Clock bindings for the Cirrus Logic CLPS711X CPUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) - compatible : Shall contain "cirrus,ep7209-clk".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - reg : Address of the internal register set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - startup-frequency: Factory set CPU startup frequency in HZ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - #clock-cells : Should be <1>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) The clock consumer should specify the desired clock by having the clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) ID in its "clocks" phandle cell. See include/dt-bindings/clock/clps711x-clock.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) for the full list of CLPS711X clock IDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) clks: clks@80000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #clock-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) compatible = "cirrus,ep7312-clk", "cirrus,ep7209-clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) reg = <0x80000000 0xc000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) startup-frequency = <73728000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };