Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) ROCKCHIP PVTM 32KHz clocks *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ROCKCHIP device has two clock sources for 32KHz, external 32k osc and internal pvtm 32k.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) This binding uses the common clock binding[1].
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - compatible :	"rockchip,rk3368-pvtm-clock" for rk3368 soc pvtm 32k clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - #clock-cells : shall be set to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Optional property:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - clock-output-names : From common clock binding.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	pvtm_clock: pvtm-clock {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		compatible = "rockchip,rk3368-pvtm-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		#clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		clocks = <&cru SCLK_PVTM_PMU>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		clock-names = "pvtm_pmu_clk";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 		clock-output-names = "xin32k_pvtm";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		status = "okay";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	};