Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/clock/calxeda.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Device Tree Clock bindings for Calxeda highbank platform
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   This binding covers the Calxeda SoC internal peripheral and bus clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)   as used by peripherals. The clocks live inside the "system register"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)   region of the SoC, so are typically presented as children of an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   "hb-sregs" node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)   - Andre Przywara <andre.przywara@arm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)   "#clock-cells":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)     const: 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)     enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)       - calxeda,hb-pll-clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)       - calxeda,hb-a9periph-clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)       - calxeda,hb-a9bus-clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)       - calxeda,hb-emmc-clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)   - "#clock-cells"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)     sregs@3fffc000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)         compatible = "calxeda,hb-sregs";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)         reg = <0x3fffc000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)         clocks {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)             #address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)             #size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)             osc: oscillator {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)                 #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)                 compatible = "fixed-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)                 clock-frequency = <33333000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)             };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)             ddrpll: ddrpll@108 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)                 #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)                 compatible = "calxeda,hb-pll-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)                 clocks = <&osc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)                 reg = <0x108>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)             };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)             a9pll: a9pll@100 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)                 #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)                 compatible = "calxeda,hb-pll-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)                 clocks = <&osc>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)                 reg = <0x100>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)             };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)             a9periphclk: a9periphclk@104 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)                 #clock-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)                 compatible = "calxeda,hb-a9periph-clock";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)                 clocks = <&a9pll>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)                 reg = <0x104>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)             };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)         };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)     };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) ...