Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Technologic Systems NBUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) The NBUS is a bus used to interface with peripherals in the Technologic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Systems FPGA on the TS-4600 SoM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) Required properties :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  - compatible		: "technologic,ts-nbus"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  - #address-cells	: must be 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  - #size-cells		: must be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  - pwms			: The PWM bound to the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  - ts,data-gpios	: The 8 GPIO pins connected to the data lines on the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  - ts,csn-gpios		: The GPIO pin connected to the csn line on the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  - ts,txrx-gpios	: The GPIO pin connected to the txrx line on the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  - ts,strobe-gpios	: The GPIO pin connected to the stobe line on the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  - ts,ale-gpios		: The GPIO pin connected to the ale line on the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  - ts,rdy-gpios		: The GPIO pin connected to the rdy line on the FPGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Child nodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) The NBUS node can contain zero or more child nodes representing peripherals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) on the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	nbus {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 		compatible = "technologic,ts-nbus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		pinctrl-0 = <&nbus_pins>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		pwms = <&pwm 2 83>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		ts,data-gpios   = <&gpio0 0 GPIO_ACTIVE_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 				   &gpio0 1 GPIO_ACTIVE_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 				   &gpio0 2 GPIO_ACTIVE_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 				   &gpio0 3 GPIO_ACTIVE_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 				   &gpio0 4 GPIO_ACTIVE_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 				   &gpio0 5 GPIO_ACTIVE_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 				   &gpio0 6 GPIO_ACTIVE_HIGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 				   &gpio0 7 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 		ts,csn-gpios    = <&gpio0 16 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		ts,txrx-gpios   = <&gpio0 24 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		ts,strobe-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 		ts,ale-gpios    = <&gpio0 26 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		ts,rdy-gpios    = <&gpio0 21 GPIO_ACTIVE_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		watchdog@2a {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 			compatible = "...";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 			/* ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		};
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	};