Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Turris Mox module status and configuration bus (over SPI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  - compatible		: Should be "cznic,moxtet"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  - #address-cells	: Has to be 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  - #size-cells		: Has to be 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  - spi-cpol		: Required inverted clock polarity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  - spi-cpha		: Required shifted clock phase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  - interrupts		: Must contain reference to the shared interrupt line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  - interrupt-controller	: Required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  - #interrupt-cells	: Has to be 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) For other required and optional properties of SPI slave nodes please refer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) ../spi/spi-bus.txt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) Required properties of subnodes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  - reg			: Should be position on the Moxtet bus (how many Moxtet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 			  modules are between this module and CPU module, so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 			  either 0 or a positive integer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) The driver finds the devices connected to the bus by itself, but it may be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) needed to reference some of them from other parts of the device tree. In that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) case the devices can be defined as subnodes of the moxtet node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	moxtet@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		compatible = "cznic,moxtet";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		#address-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		#size-cells = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		reg = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		spi-max-frequency = <10000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		spi-cpol;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		spi-cpha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 		interrupt-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		#interrupt-cells = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 		interrupt-parent = <&gpiosb>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		moxtet_sfp: gpio@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			compatible = "cznic,moxtet-gpio";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			gpio-controller;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			#gpio-cells = <2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 			reg = <0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	};