Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) * Qualcomm AHCI SATA Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) SATA nodes are defined to describe on-chip Serial ATA controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Each SATA controller should have its own node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) - compatible		: compatible list, must contain "generic-ahci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) - interrupts		: <interrupt mapping for SATA IRQ>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) - reg			: <registers mapping>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - phys			: Must contain exactly one entry as specified
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 			  in phy-bindings.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - phy-names		: Must be "sata-phy"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Required properties for "qcom,ipq806x-ahci" compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - clocks		: Must contain an entry for each entry in clock-names.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) - clock-names		: Shall be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 				"slave_iface" - Fabric port AHB clock for SATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 				"iface" - AHB clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 				"core" - core clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 				"rxoob" - RX out-of-band clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 				"pmalive" - Power Module Alive clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - assigned-clocks	: Shall be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 				SATA_RXOOB_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 				SATA_PMALIVE_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - assigned-clock-rates	: Shall be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 				100Mhz (100000000) for SATA_RXOOB_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 				100Mhz (100000000) for SATA_PMALIVE_CLK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	sata@29000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		compatible = "qcom,ipq806x-ahci", "generic-ahci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		reg = <0x29000000 0x180>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		interrupts = <0 209 0x0>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		clocks = <&gcc SFAB_SATA_S_H_CLK>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 			 <&gcc SATA_H_CLK>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 			 <&gcc SATA_A_CLK>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			 <&gcc SATA_RXOOB_CLK>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 			 <&gcc SATA_PMALIVE_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		clock-names = "slave_iface", "iface", "core",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 				"rxoob", "pmalive";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		assigned-clock-rates = <100000000>, <100000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 		phys = <&sata_phy>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		phy-names = "sata-phy";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	};