Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) $id: http://devicetree.org/schemas/ata/imx-sata.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) title: Freescale i.MX AHCI SATA Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)   - Shawn Guo <shawn.guo@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)   The Freescale i.MX SATA controller mostly conforms to the AHCI interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)   with some special extensions at integration level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)   compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)     enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)       - fsl,imx53-ahci
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)       - fsl,imx6q-ahci
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)       - fsl,imx6qp-ahci
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)   reg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)   interrupts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)     maxItems: 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)   clocks:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)       - description: sata clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)       - description: sata reference clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)       - description: ahb clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)   clock-names:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)     items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)       - const: sata
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)       - const: sata_ref
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)       - const: ahb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)   fsl,transmit-level-mV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)     description: transmit voltage level, in millivolts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)   fsl,transmit-boost-mdB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)     description: transmit boost level, in milli-decibels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)   fsl,transmit-atten-16ths:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)     description: transmit attenuation, in 16ths.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)   fsl,receive-eq-mdB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)     $ref: /schemas/types.yaml#/definitions/uint32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)     description: receive equalisation, in milli-decibels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)   fsl,no-spread-spectrum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)     $ref: /schemas/types.yaml#/definitions/flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)     description: if present, disable spread-spectrum clocking on the SATA link.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) required:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)   - compatible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)   - reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)   - interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)   - clocks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)   - clock-names
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) additionalProperties: false
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)   - |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)     #include <dt-bindings/clock/imx6qdl-clock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)     #include <dt-bindings/interrupt-controller/arm-gic.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)     sata@2200000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)         compatible = "fsl,imx6q-ahci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)         reg = <0x02200000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)         interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)         clocks = <&clks IMX6QDL_CLK_SATA>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)                  <&clks IMX6QDL_CLK_SATA_REF_100M>,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)                  <&clks IMX6QDL_CLK_AHB>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)         clock-names = "sata", "sata_ref", "ahb";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)     };