^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) * Freescale 8xxx/3.0 Gb/s SATA nodes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) SATA nodes are defined to describe on-chip Serial ATA controllers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Each SATA port should have its own node.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) - compatible : compatible list, contains 2 entries, first is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) "fsl,CHIP-sata", where CHIP is the processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) (mpc8315, mpc8379, etc.) and the second is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) "fsl,pq-sata"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - interrupts : <interrupt mapping for SATA IRQ>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - cell-index : controller index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 1 for controller @ 0x18000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 2 for controller @ 0x19000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 3 for controller @ 0x1a000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 4 for controller @ 0x1b000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - reg : <registers mapping>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) sata@18000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) reg = <0x18000 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) cell-index = <1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) interrupts = <2c 8>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) interrupt-parent = < &ipic >;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };