Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) Device tree binding for the TI DM816 AHCI SATA Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) ---------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)   - compatible: must be "ti,dm816-ahci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)   - reg: physical base address and size of the register region used by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)          the controller (as defined by the AHCI 1.1 standard)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)   - interrupts: interrupt specifier (refer to the interrupt binding)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)   - clocks: list of phandle and clock specifier pairs (or only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)             phandles for clock providers with '0' defined for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)             #clock-cells); two clocks must be specified: the functional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)             clock and an external reference clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	sata: sata@4a140000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		compatible = "ti,dm816-ahci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		reg = <0x4a140000 0x10000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 		interrupts = <16>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		clocks = <&sysclk5_ck>, <&sata_refclk>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	};