^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) Device tree binding for the TI DA850 AHCI SATA Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ---------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) - compatible: must be "ti,da850-ahci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) - reg: physical base addresses and sizes of the two register regions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) used by the controller: the register map as defined by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) AHCI 1.1 standard and the Power Down Control Register (PWRDN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) for enabling/disabling the SATA clock receiver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - interrupts: interrupt specifier (refer to the interrupt binding)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) sata: sata@218000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) compatible = "ti,da850-ahci";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) reg = <0x218000 0x2000>, <0x22c018 0x4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) interrupts = <67>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) };