^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) %YAML 1.2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ---
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) $id: http://devicetree.org/schemas/arm/xilinx.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) $schema: http://devicetree.org/meta-schemas/core.yaml#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) title: Xilinx Zynq Platforms Device Tree Bindings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) maintainers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) - Michal Simek <michal.simek@xilinx.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) description: |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Xilinx boards with Zynq-7000 SOC or Zynq UltraScale+ MPSoC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) $nodename:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) const: '/'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) compatible:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) oneOf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) - adapteva,parallella
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - digilent,zynq-zybo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) - digilent,zynq-zybo-z7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - xlnx,zynq-cc108
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - xlnx,zynq-zc702
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) - xlnx,zynq-zc706
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) - xlnx,zynq-zc770-xm010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - xlnx,zynq-zc770-xm011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - xlnx,zynq-zc770-xm012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - xlnx,zynq-zc770-xm013
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - const: xlnx,zynq-7000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - const: avnet,zynq-microzed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - const: xlnx,zynq-microzed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - const: xlnx,zynq-7000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - const: avnet,zynq-zed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - const: xlnx,zynq-zed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) - const: xlnx,zynq-7000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) - xlnx,zynqmp-zc1751
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) - description: Xilinx internal board zc1232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) - const: xlnx,zynqmp-zc1232-revA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) - const: xlnx,zynqmp-zc1232
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) - description: Xilinx internal board zc1254
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) - const: xlnx,zynqmp-zc1254-revA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) - const: xlnx,zynqmp-zc1254
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) - description: Xilinx internal board zc1275
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) - const: xlnx,zynqmp-zc1275-revA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) - const: xlnx,zynqmp-zc1275
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - description: Xilinx 96boards compatible board zcu100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) - const: xlnx,zynqmp-zcu100-revC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) - const: xlnx,zynqmp-zcu100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - description: Xilinx 96boards compatible board Ultra96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) - const: avnet,ultra96-rev1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) - const: avnet,ultra96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) - const: xlnx,zynqmp-zcu100-revC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) - const: xlnx,zynqmp-zcu100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) - description: Xilinx evaluation board zcu102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) - xlnx,zynqmp-zcu102-revA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) - xlnx,zynqmp-zcu102-revB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) - xlnx,zynqmp-zcu102-rev1.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - const: xlnx,zynqmp-zcu102
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) - description: Xilinx evaluation board zcu104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) - xlnx,zynqmp-zcu104-revA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) - xlnx,zynqmp-zcu104-rev1.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) - const: xlnx,zynqmp-zcu104
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) - description: Xilinx evaluation board zcu106
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) - xlnx,zynqmp-zcu106-revA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - xlnx,zynqmp-zcu106-rev1.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) - const: xlnx,zynqmp-zcu106
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) - description: Xilinx evaluation board zcu111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) items:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) - enum:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) - xlnx,zynqmp-zcu111-revA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) - xlnx,zynqmp-zcu11-rev1.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) - const: xlnx,zynqmp-zcu111
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) - const: xlnx,zynqmp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) additionalProperties: true
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) ...