Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) ARM Versatile Express Serial Configuration Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) -----------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) Test chips for ARM Versatile Express platform implement SCC (Serial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) Configuration Controller) interface, used to set initial conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) for the test chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) In some cases its registers are also mapped in normal address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) and can be used to obtain runtime information about the chip internals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) (like silicon temperature sensors) and as interface to other subsystems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) like platform configuration control and power management.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 		    where <model> is the full tile model name (as used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 		    in the tile's Technical Reference Manual),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 		    eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Optional properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) - reg: when the SCC is memory mapped, physical address and size of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)        registers window
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) - interrupts: when the SCC can generate a system-level interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	scc@7fff0000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		reg = <0 0x7fff0000 0 0x1000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 		interrupts = <0 95 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	};