^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) # SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) # (C) COPYRIGHT 2013-2021 ARM Limited. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) # This program is free software and is provided to you under the terms of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) # GNU General Public License version 2 as published by the Free Software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) # Foundation, and any use by you of this program is subject to the terms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) # of such GNU license.
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) # but WITHOUT ANY WARRANTY; without even the implied warranty of
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) # GNU General Public License for more details.
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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) # You should have received a copy of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) # along with this program; if not, you can access it online at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) # http://www.gnu.org/licenses/gpl-2.0.html.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * ARM Mali Midgard / Bifrost devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) Required properties:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) - compatible : Should be mali<chip>, replacing digits with x from the back,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) until malit<Major>xx, and it must end with one of: "arm,malit6xx" or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) "arm,mali-midgard" or "arm,mali-bifrost"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - reg : Physical base address of the device and length of the register area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - interrupts : Contains the three IRQ lines required by T-6xx devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) - interrupt-names : Contains the names of IRQ resources in the order they were
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) provided in the interrupts property. Must contain: "JOB, "MMU", "GPU".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Optional:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - clocks : One or more pairs of phandle to clock and clock specifier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) for the Mali device. The order is important: the first clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) shall correspond to the "clk_mali" source, while the second clock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) (that is optional) shall correspond to the "shadercores" source.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) - clock-names : Shall be set to: "clk_mali", "shadercores".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) - mali-supply : Phandle to the top level regulator for the Mali device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) Refer to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Documentation/devicetree/bindings/regulator/regulator.txt for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) - mem-supply : Phandle to memory regulator for the Mali device. This is optional.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) - operating-points-v2 : Refer to Documentation/devicetree/bindings/power/mali-opp.txt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) for details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) - quirks_gpu : Used to write to the JM_CONFIG or CSF_CONFIG register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) Should be used with care. Options passed here are used to override
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) certain default behavior. Note: This will override 'idvs-group-size'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) field in devicetree and module param 'corestack_driver_control',
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) therefore if 'quirks_gpu' is used then 'idvs-group-size' and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 'corestack_driver_control' value should be incorporated into 'quirks_gpu'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) - quirks_sc : Used to write to the SHADER_CONFIG register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) Should be used with care. Options passed here are used to override
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) certain default behavior.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) - quirks_tiler : Used to write to the TILER_CONFIG register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) Should be used with care. Options passed here are used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) disable or override certain default behavior.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) - quirks_mmu : Used to write to the L2_CONFIG register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) Should be used with care. Options passed here are used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) disable or override certain default behavior.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) - power_model : Sets the power model parameters. Defined power models include:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) "mali-simple-power-model", "mali-g51-power-model", "mali-g52-power-model",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) "mali-g52_r1-power-model", "mali-g71-power-model", "mali-g72-power-model",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) "mali-g76-power-model", "mali-g77-power-model", "mali-tnax-power-model",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) "mali-tbex-power-model" and "mali-tbax-power-model".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - mali-simple-power-model: this model derives the GPU power usage based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) on the GPU voltage scaled by the system temperature. Note: it was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) designed for the Juno platform, and may not be suitable for others.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) - compatible: Should be "arm,mali-simple-power-model"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) - dynamic-coefficient: Coefficient, in pW/(Hz V^2), which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) multiplied by v^2*f to calculate the dynamic power consumption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) - static-coefficient: Coefficient, in uW/V^3, which is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) multiplied by v^3 to calculate the static power consumption.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) - ts: An array containing coefficients for the temperature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) scaling factor. This is used to scale the static power by a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) factor of tsf/1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) where tsf = ts[3]*T^3 + ts[2]*T^2 + ts[1]*T + ts[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) and T = temperature in degrees.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) - thermal-zone: A string identifying the thermal zone used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) the GPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) - temp-poll-interval-ms: the interval at which the system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) temperature is polled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) - mali-g*-power-model(s): unless being stated otherwise, these models derive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) the GPU power usage based on performance counters, so they are more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) accurate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - compatible: Should be, as examples, "arm,mali-g51-power-model" /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) "arm,mali-g72-power-model".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) - scale: the dynamic power calculated by the power model is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) multiplied by a factor of 'scale'. This value should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) chosen to match a particular implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) - min_sample_cycles: Fall back to the simple power model if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) number of GPU cycles for a given counter dump is less than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 'min_sample_cycles'. The default value of this should suffice.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * Note: when IPA is used, two separate power models (simple and counter-based)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) are used at different points so care should be taken to configure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) both power models in the device tree (specifically dynamic-coefficient,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static-coefficient and scale) to best match the platform.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) - power_policy : Sets the GPU power policy at probe time. Available options are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) "coarse_demand" and "always_on". If not set, then "coarse_demand" is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) - system-coherency : Sets the coherency protocol to be used for coherent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) accesses made from the GPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) If not set then no coherency is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - 0 : ACE-Lite
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) - 1 : ACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) - 31 : No coherency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) - ipa-model : Sets the IPA model to be used for power management. GPU probe will fail if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) model is not found in the registered models list. If no model is specified here,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) a gpu-id based model is picked if available, otherwise the default model is used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) - mali-simple-power-model: Default model used on mali
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) - idvs-group-size : Override the IDVS group size value. Tasks are sent to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) cores in groups of N + 1, so i.e. 0xF means 16 tasks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) Valid values are between 0 to 0x3F (including).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) - l2-size : Override L2 cache size on GPU that supports it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) - l2-hash : Override L2 hash function on GPU that supports it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) - l2-hash-values : Override L2 hash function using provided hash values, on GPUs that supports it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) It is mutually exclusive with 'l2-hash'. Only one or the other must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) used in a supported GPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) - arbiter_if : Phandle to the arbif platform device, used to provide KBASE with an interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) to the Arbiter. This is required when using arbitration; setting to a non-NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) value will enable arbitration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) If arbitration is in use, then there should be no external GPU control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) When arbiter_if is in use then the following must not be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) - power_model (no IPA allowed with arbitration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) - #cooling-cells
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) - operating-points-v2 (no dvfs in kbase with arbitration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) - system-coherency with a value of 1 (no full coherency with arbitration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) - int_id_override: list of <ID Setting[7:0]> tuples defining the IDs needed to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) set and the setting coresponding to the SYSC_ALLOC register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) Example for a Mali GPU with 1 clock and no regulators:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) gpu@0xfc010000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) reg = <0xfc010000 0x4000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) interrupt-names = "JOB", "MMU", "GPU";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) clocks = <&pclk_mali>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) clock-names = "clk_mali";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) mali-supply = <&vdd_mali>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) operating-points-v2 = <&gpu_opp_table>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) power_model@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) compatible = "arm,mali-simple-power-model";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static-coefficient = <2427750>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) dynamic-coefficient = <4687>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ts = <20000 2000 (-20) 2>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) thermal-zone = "gpu";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) power_model@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) compatible = "arm,mali-g71-power-model";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) scale = <5>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) idvs-group-size = <0x7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) l2-size = /bits/ 8 <0x10>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) l2-hash = /bits/ 8 <0x04>; /* or l2-hash-values = <0x12345678 0x8765 0xAB>; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) gpu_opp_table: opp_table0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) compatible = "operating-points-v2";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) opp@533000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) opp-hz = /bits/ 64 <533000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) opp-microvolt = <1250000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) opp@450000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) opp-hz = /bits/ 64 <450000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) opp-microvolt = <1150000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) opp@400000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) opp-hz = /bits/ 64 <400000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) opp-microvolt = <1125000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) opp@350000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) opp-hz = /bits/ 64 <350000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) opp-microvolt = <1075000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) opp@266000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) opp-hz = /bits/ 64 <266000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) opp-microvolt = <1025000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) opp@160000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) opp-hz = /bits/ 64 <160000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) opp-microvolt = <925000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) opp@100000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) opp-hz = /bits/ 64 <100000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) opp-microvolt = <912500>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) Example for a Mali GPU with 2 clocks and 2 regulators:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) gpu: gpu@6e000000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) compatible = "arm,mali-midgard";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) reg = <0x0 0x6e000000 0x0 0x200000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) interrupts = <0 168 4>, <0 168 4>, <0 168 4>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) interrupt-names = "JOB", "MMU", "GPU";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) clocks = <&clk_mali 0>, <&clk_mali 1>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) clock-names = "clk_mali", "shadercores";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) mali-supply = <&supply0_3v3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) mem-supply = <&supply1_3v3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) system-coherency = <31>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) operating-points-v2 = <&gpu_opp_table>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) gpu_opp_table: opp_table0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) compatible = "operating-points-v2", "operating-points-v2-mali";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) opp@0 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) opp-hz = /bits/ 64 <50000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) opp-hz-real = /bits/ 64 <50000000>, /bits/ 64 <45000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) opp-microvolt = <820000>, <800000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) opp-core-mask = /bits/ 64 <0xf>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) opp@1 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) opp-hz = /bits/ 64 <40000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) opp-hz-real = /bits/ 64 <40000000>, /bits/ 64 <35000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) opp-microvolt = <720000>, <700000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) opp-core-mask = /bits/ 64 <0x7>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) opp@2 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) opp-hz = /bits/ 64 <30000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) opp-hz-real = /bits/ 64 <30000000>, /bits/ 64 <25000000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) opp-microvolt = <620000>, <700000>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) opp-core-mask = /bits/ 64 <0x3>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) Example for a Mali GPU supporting PBHA configuration via DTB (default):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) gpu@0xfc010000 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) pbha {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) int_id_override = <2 0x32>, <9 0x05>, <16 0x32>;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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