^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ARM64 ELF hwcaps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) This document describes the usage and semantics of the arm64 ELF hwcaps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) 1. Introduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Some hardware or software features are only available on some CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) implementations, and/or with certain kernel configurations, but have no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) architected discovery mechanism available to userspace code at EL0. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) kernel exposes the presence of these features to userspace through a set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) of flags called hwcaps, exposed in the auxilliary vector.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) Userspace software can test for features by acquiring the AT_HWCAP or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) AT_HWCAP2 entry of the auxiliary vector, and testing whether the relevant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) flags are set, e.g.::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) bool floating_point_is_present(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) unsigned long hwcaps = getauxval(AT_HWCAP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) if (hwcaps & HWCAP_FP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) Where software relies on a feature described by a hwcap, it should check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) the relevant hwcap flag to verify that the feature is present before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) attempting to make use of the feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) Features cannot be probed reliably through other means. When a feature
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) is not available, attempting to use it may result in unpredictable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) behaviour, and is not guaranteed to result in any reliable indication
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) that the feature is unavailable, such as a SIGILL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 2. Interpretation of hwcaps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ---------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) The majority of hwcaps are intended to indicate the presence of features
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) which are described by architected ID registers inaccessible to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) userspace code at EL0. These hwcaps are defined in terms of ID register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) fields, and should be interpreted with reference to the definition of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) these fields in the ARM Architecture Reference Manual (ARM ARM).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Such hwcaps are described below in the form::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) Functionality implied by idreg.field == val.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) Such hwcaps indicate the availability of functionality that the ARM ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) defines as being present when idreg.field has value val, but do not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) indicate that idreg.field is precisely equal to val, nor do they
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) indicate the absence of functionality implied by other values of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) idreg.field.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Other hwcaps may indicate the presence of features which cannot be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) described by ID registers alone. These may be described without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) reference to ID registers, and may refer to other documentation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 3. The hwcaps exposed in AT_HWCAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) ---------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) HWCAP_FP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) Functionality implied by ID_AA64PFR0_EL1.FP == 0b0000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) HWCAP_ASIMD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) HWCAP_EVTSTRM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) The generic timer is configured to generate events at a frequency of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) approximately 100KHz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) HWCAP_AES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) HWCAP_PMULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) Functionality implied by ID_AA64ISAR0_EL1.AES == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) HWCAP_SHA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) Functionality implied by ID_AA64ISAR0_EL1.SHA1 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) HWCAP_SHA2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) HWCAP_CRC32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) Functionality implied by ID_AA64ISAR0_EL1.CRC32 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) HWCAP_ATOMICS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) Functionality implied by ID_AA64ISAR0_EL1.Atomic == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) HWCAP_FPHP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) Functionality implied by ID_AA64PFR0_EL1.FP == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) HWCAP_ASIMDHP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) Functionality implied by ID_AA64PFR0_EL1.AdvSIMD == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) HWCAP_CPUID
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) EL0 access to certain ID registers is available, to the extent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) described by Documentation/arm64/cpu-feature-registers.rst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) These ID registers may imply the availability of features.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) HWCAP_ASIMDRDM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) Functionality implied by ID_AA64ISAR0_EL1.RDM == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) HWCAP_JSCVT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) Functionality implied by ID_AA64ISAR1_EL1.JSCVT == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) HWCAP_FCMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) Functionality implied by ID_AA64ISAR1_EL1.FCMA == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) HWCAP_LRCPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) HWCAP_DCPOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) HWCAP_SHA3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) Functionality implied by ID_AA64ISAR0_EL1.SHA3 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) HWCAP_SM3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) Functionality implied by ID_AA64ISAR0_EL1.SM3 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) HWCAP_SM4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) Functionality implied by ID_AA64ISAR0_EL1.SM4 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) HWCAP_ASIMDDP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) Functionality implied by ID_AA64ISAR0_EL1.DP == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) HWCAP_SHA512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) Functionality implied by ID_AA64ISAR0_EL1.SHA2 == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) HWCAP_SVE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) Functionality implied by ID_AA64PFR0_EL1.SVE == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) HWCAP_ASIMDFHM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) Functionality implied by ID_AA64ISAR0_EL1.FHM == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) HWCAP_DIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) Functionality implied by ID_AA64PFR0_EL1.DIT == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) HWCAP_USCAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) Functionality implied by ID_AA64MMFR2_EL1.AT == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) HWCAP_ILRCPC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) Functionality implied by ID_AA64ISAR1_EL1.LRCPC == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) HWCAP_FLAGM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) HWCAP_SSBS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) Functionality implied by ID_AA64PFR1_EL1.SSBS == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) HWCAP_SB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) Functionality implied by ID_AA64ISAR1_EL1.SB == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) HWCAP_PACA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) Functionality implied by ID_AA64ISAR1_EL1.APA == 0b0001 or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) ID_AA64ISAR1_EL1.API == 0b0001, as described by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) Documentation/arm64/pointer-authentication.rst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) HWCAP_PACG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) Functionality implied by ID_AA64ISAR1_EL1.GPA == 0b0001 or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ID_AA64ISAR1_EL1.GPI == 0b0001, as described by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) Documentation/arm64/pointer-authentication.rst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) HWCAP2_DCPODP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) Functionality implied by ID_AA64ISAR1_EL1.DPB == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) HWCAP2_SVE2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) Functionality implied by ID_AA64ZFR0_EL1.SVEVer == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) HWCAP2_SVEAES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) HWCAP2_SVEPMULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) Functionality implied by ID_AA64ZFR0_EL1.AES == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) HWCAP2_SVEBITPERM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) Functionality implied by ID_AA64ZFR0_EL1.BitPerm == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) HWCAP2_SVESHA3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) Functionality implied by ID_AA64ZFR0_EL1.SHA3 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) HWCAP2_SVESM4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) Functionality implied by ID_AA64ZFR0_EL1.SM4 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) HWCAP2_FLAGM2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) Functionality implied by ID_AA64ISAR0_EL1.TS == 0b0010.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) HWCAP2_FRINT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) Functionality implied by ID_AA64ISAR1_EL1.FRINTTS == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) HWCAP2_SVEI8MM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) Functionality implied by ID_AA64ZFR0_EL1.I8MM == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) HWCAP2_SVEF32MM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) Functionality implied by ID_AA64ZFR0_EL1.F32MM == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) HWCAP2_SVEF64MM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) Functionality implied by ID_AA64ZFR0_EL1.F64MM == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) HWCAP2_SVEBF16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) Functionality implied by ID_AA64ZFR0_EL1.BF16 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) HWCAP2_I8MM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) Functionality implied by ID_AA64ISAR1_EL1.I8MM == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) HWCAP2_BF16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) Functionality implied by ID_AA64ISAR1_EL1.BF16 == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) HWCAP2_DGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) Functionality implied by ID_AA64ISAR1_EL1.DGH == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) HWCAP2_RNG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) Functionality implied by ID_AA64ISAR0_EL1.RNDR == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) HWCAP2_BTI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) HWCAP2_MTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) by Documentation/arm64/memory-tagging-extension.rst.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) HWCAP2_ECV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) Functionality implied by ID_AA64MMFR0_EL1.ECV == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) HWCAP2_AFP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) Functionality implied by ID_AA64MFR1_EL1.AFP == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) HWCAP2_RPRES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) Functionality implied by ID_AA64ISAR2_EL1.RPRES == 0b0001.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 4. Unused AT_HWCAP bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) -----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) For interoperation with userspace, the kernel guarantees that bits 62
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) and 63 of AT_HWCAP will always be returned as 0.