^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) .. _amu_index:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Activity Monitors Unit (AMU) extension in AArch64 Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) =======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) Author: Ionela Voinescu <ionela.voinescu@arm.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) Date: 2019-09-10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) This document briefly describes the provision of Activity Monitors Unit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) support in AArch64 Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Architecture overview
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ---------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) The activity monitors extension is an optional extension introduced by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ARMv8.4 CPU architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) The activity monitors unit, implemented in each CPU, provides performance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) counters intended for system management use. The AMU extension provides a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) system register interface to the counter registers and also supports an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) optional external memory-mapped interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Version 1 of the Activity Monitors architecture implements a counter group
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) of four fixed and architecturally defined 64-bit event counters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) - CPU cycle counter: increments at the frequency of the CPU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) - Constant counter: increments at the fixed frequency of the system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) - Instructions retired: increments with every architecturally executed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - Memory stall cycles: counts instruction dispatch stall cycles caused by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) misses in the last level cache within the clock domain.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) When in WFI or WFE these counters do not increment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) The Activity Monitors architecture provides space for up to 16 architected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) event counters. Future versions of the architecture may use this space to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) implement additional architected event counters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) Additionally, version 1 implements a counter group of up to 16 auxiliary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 64-bit event counters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) On cold reset all counters reset to 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) Basic support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) -------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) The kernel can safely run a mix of CPUs with and without support for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) activity monitors extension. Therefore, when CONFIG_ARM64_AMU_EXTN is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) selected we unconditionally enable the capability to allow any late CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) (secondary or hotplugged) to detect and use the feature.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) When the feature is detected on a CPU, we flag the availability of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) feature but this does not guarantee the correct functionality of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) counters, only the presence of the extension.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) Firmware (code running at higher exception levels, e.g. arm-tf) support is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) needed to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) - Enable access for lower exception levels (EL2 and EL1) to the AMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) - Enable the counters. If not enabled these will read as 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) - Save/restore the counters before/after the CPU is being put/brought up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) from the 'off' power state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) When using kernels that have this feature enabled but boot with broken
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) firmware the user may experience panics or lockups when accessing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) counter registers. Even if these symptoms are not observed, the values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) returned by the register reads might not correctly reflect reality. Most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) commonly, the counters will read as 0, indicating that they are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) If proper support is not provided in firmware it's best to disable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) CONFIG_ARM64_AMU_EXTN. To be noted that for security reasons, this does not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) bypass the setting of AMUSERENR_EL0 to trap accesses from EL0 (userspace) to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) EL1 (kernel). Therefore, firmware should still ensure accesses to AMU registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) are not trapped in EL2/EL3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) The fixed counters of AMUv1 are accessible though the following system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) register definitions:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) - SYS_AMEVCNTR0_CORE_EL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) - SYS_AMEVCNTR0_CONST_EL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) - SYS_AMEVCNTR0_INST_RET_EL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) - SYS_AMEVCNTR0_MEM_STALL_EL0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) Auxiliary platform specific counters can be accessed using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) SYS_AMEVCNTR1_EL0(n), where n is a value between 0 and 15.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) Details can be found in: arch/arm64/include/asm/sysreg.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) Userspace access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) ----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) Currently, access from userspace to the AMU registers is disabled due to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) - Security reasons: they might expose information about code executed in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) secure mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) - Purpose: AMU counters are intended for system management use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) Also, the presence of the feature is not visible to userspace.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) Virtualization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) --------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) Currently, access from userspace (EL0) and kernelspace (EL1) on the KVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) guest side is disabled due to:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) - Security reasons: they might expose information about code executed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) by other guests or the host.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) Any attempt to access the AMU registers will result in an UNDEFINED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) exception being injected into the guest.
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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