^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) =======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Frequently asked questions about the sunxi clock system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) This document contains useful bits of information that people tend to ask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) about the sunxi clock system, as well as accompanying ASCII art when adequate.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Q: Why is the main 24MHz oscillator gatable? Wouldn't that break the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) system?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) A: The 24MHz oscillator allows gating to save power. Indeed, if gated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) carelessly the system would stop functioning, but with the right
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) steps, one can gate it and keep the system running. Consider this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) simplified suspend example:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) While the system is operational, you would see something like::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 24MHz 32kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) PLL1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) \_ CPU Mux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) [CPU]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) When you are about to suspend, you switch the CPU Mux to the 32kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) oscillator::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 24Mhz 32kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) | |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) PLL1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) CPU Mux _/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) [CPU]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) Finally you can gate the main oscillator::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 32kHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) CPU Mux _/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) [CPU]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) Q: Were can I learn more about the sunxi clocks?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) A: The linux-sunxi wiki contains a page documenting the clock registers,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) you can find it at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) http://linux-sunxi.org/A10/CCM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) The authoritative source for information at this time is the ccmu driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) released by Allwinner, you can find it at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) https://github.com/linux-sunxi/linux-sunxi/tree/sunxi-3.0/arch/arm/mach-sun4i/clock/ccmu