^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) STM32MP157 Overview
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ===================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Introduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) The STM32MP157 is a Cortex-A MPU aimed at various applications.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) It features:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) - Dual core Cortex-A7 application core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) - 2D/3D image composition with GPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) - Standard memories interface support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) - Standard connectivity, widely inherited from the STM32 MCU family
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) - Comprehensive security support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) :Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) - Ludovic Barre <ludovic.barre@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) - Gerald Baeza <gerald.baeza@st.com>