^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) =======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) S3C24XX Suspend Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) =======================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Introduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) The S3C24XX supports a low-power suspend mode, where the SDRAM is kept
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) in Self-Refresh mode, and all but the essential peripheral blocks are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) powered down. For more information on how this works, please look
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) at the relevant CPU datasheet from Samsung.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) Requirements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 1) A bootloader that can support the necessary resume operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 2) Support for at least 1 source for resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 3) CONFIG_PM enabled in the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 4) Any peripherals that are going to be powered down at the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) time require suspend/resume support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) Resuming
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) --------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) The S3C2410 user manual defines the process of sending the CPU to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) sleep and how it resumes. The default behaviour of the Linux code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) is to set the GSTATUS3 register to the physical address of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) code to resume Linux operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) GSTATUS4 is currently left alone by the sleep code, and is free to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) use for any other purposes (for example, the EB2410ITX uses this to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) save memory configuration in).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Machine Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) The machine specific functions must call the s3c_pm_init() function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) to say that its bootloader is capable of resuming. This can be as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) simple as adding the following to the machine's definition:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) INITMACHINE(s3c_pm_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) A board can do its own setup before calling s3c_pm_init, if it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) needs to setup anything else for power management support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) There is currently no support for over-riding the default method of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) saving the resume address, if your board requires it, then contact
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) the maintainer and discuss what is required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) Note, the original method of adding an late_initcall() is wrong,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) and will end up initialising all compiled machines' pm init!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) The following is an example of code used for testing wakeup from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) an falling edge on IRQ_EINT0::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) static irqreturn_t button_irq(int irq, void *pw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) statuc void __init machine_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) request_irq(IRQ_EINT0, button_irq, IRQF_TRIGGER_FALLING,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) "button-irq-eint0", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) enable_irq_wake(IRQ_EINT0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) s3c_pm_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) Debugging
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) There are several important things to remember when using PM suspend:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 1) The uart drivers will disable the clocks to the UART blocks when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) suspending, which means that use of printascii() or similar direct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) access to the UARTs will cause the debug to stop.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 2) While the pm code itself will attempt to re-enable the UART clocks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) care should be taken that any external clock sources that the UARTs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) rely on are still enabled at that point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 3) If any debugging is placed in the resume path, then it must have the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) relevant clocks and peripherals setup before use (ie, bootloader).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) For example, if you transmit a character from the UART, the baud
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) rate and uart controls must be setup beforehand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) Configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) -------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) The S3C2410 specific configuration in `System Type` defines various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) aspects of how the S3C2410 suspend and resume support is configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) `S3C2410 PM Suspend debug`
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) This option prints messages to the serial console before and after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) the actual suspend, giving detailed information on what is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) happening
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) `S3C2410 PM Suspend Memory CRC`
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) Allows the entire memory to be checksummed before and after the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) suspend to see if there has been any corruption of the contents.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) Note, the time to calculate the CRC is dependent on the CPU speed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) and the size of memory. For an 64Mbyte RAM area on an 200MHz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) S3C2410, this can take approximately 4 seconds to complete.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) This support requires the CRC32 function to be enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) `S3C2410 PM Suspend CRC Chunksize (KiB)`
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) Defines the size of memory each CRC chunk covers. A smaller value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) will mean that the CRC data block will take more memory, but will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) identify any faults with better precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) Document Author
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ---------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) Ben Dooks, Copyright 2004 Simtec Electronics
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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