^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) S3C24XX GPIO Control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ====================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Introduction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) The s3c2410 kernel provides an interface to configure and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) manipulate the state of the GPIO pins, and find out other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) information about them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) There are a number of conditions attached to the configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) of the s3c2410 GPIO system, please read the Samsung provided
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) data-sheet/users manual to find out the complete list.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) See Documentation/arm/samsung/gpio.rst for the core implementation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) GPIOLIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) -------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) With the event of the GPIOLIB in drivers/gpio, support for some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) of the GPIO functions such as reading and writing a pin will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) be removed in favour of this common access method.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Once all the extant drivers have been converted, the functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) listed below will be removed (they may be marked as __deprecated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) in the near future).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) The following functions now either have a `s3c_` specific variant
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) or are merged into gpiolib. See the definitions in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) arch/arm/plat-samsung/include/plat/gpio-cfg.h:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) - s3c2410_gpio_setpin() gpio_set_value() or gpio_direction_output()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) - s3c2410_gpio_getpin() gpio_get_value() or gpio_direction_input()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) - s3c2410_gpio_getirq() gpio_to_irq()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) - s3c2410_gpio_cfgpin() s3c_gpio_cfgpin()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) - s3c2410_gpio_getcfg() s3c_gpio_getcfg()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) - s3c2410_gpio_pullup() s3c_gpio_setpull()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) GPIOLIB conversion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) ------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) If you need to convert your board or driver to use gpiolib from the phased
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) out s3c2410 API, then here are some notes on the process.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 1) If your board is exclusively using an GPIO, say to control peripheral
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) power, then it will require to claim the gpio with gpio_request() before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) it can use it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) It is recommended to check the return value, with at least WARN_ON()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) during initialisation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 2) The s3c2410_gpio_cfgpin() can be directly replaced with s3c_gpio_cfgpin()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) as they have the same arguments, and can either take the pin specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) values, or the more generic special-function-number arguments.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 3) s3c2410_gpio_pullup() changes have the problem that while the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) s3c2410_gpio_pullup(x, 1) can be easily translated to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) s3c_gpio_setpull(x, S3C_GPIO_PULL_NONE), the s3c2410_gpio_pullup(x, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) are not so easy.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) The s3c2410_gpio_pullup(x, 0) case enables the pull-up (or in the case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) of some of the devices, a pull-down) and as such the new API distinguishes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) between the UP and DOWN case. There is currently no 'just turn on' setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) which may be required if this becomes a problem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 4) s3c2410_gpio_setpin() can be replaced by gpio_set_value(), the old call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) does not implicitly configure the relevant gpio to output. The gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) direction should be changed before using gpio_set_value().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 5) s3c2410_gpio_getpin() is replaceable by gpio_get_value() if the pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) has been set to input. It is currently unknown what the behaviour is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) when using gpio_get_value() on an output pin (s3c2410_gpio_getpin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) would return the value the pin is supposed to be outputting).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 6) s3c2410_gpio_getirq() should be directly replaceable with the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) gpio_to_irq() call.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) The s3c2410_gpio and `gpio_` calls have always operated on the same gpio
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) numberspace, so there is no problem with converting the gpio numbering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) between the calls.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) Headers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) -------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) See arch/arm/mach-s3c24xx/include/mach/regs-gpio.h for the list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) of GPIO pins, and the configuration values for them. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) is included by using #include <mach/regs-gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) PIN Numbers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) -----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) Each pin has an unique number associated with it in regs-gpio.h,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) e.g. S3C2410_GPA(0) or S3C2410_GPF(1). These defines are used to tell
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) the GPIO functions which pin is to be used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) With the conversion to gpiolib, there is no longer a direct conversion
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) from gpio pin number to register base address as in earlier kernels. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) is due to the number space required for newer SoCs where the later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) GPIOs are not contiguous.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) Configuring a pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) -----------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) The following function allows the configuration of a given pin to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) be changed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) void s3c_gpio_cfgpin(unsigned int pin, unsigned int function);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) e.g.:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) s3c_gpio_cfgpin(S3C2410_GPA(0), S3C_GPIO_SFN(1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) s3c_gpio_cfgpin(S3C2410_GPE(8), S3C_GPIO_SFN(2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) which would turn GPA(0) into the lowest Address line A0, and set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) GPE(8) to be connected to the SDIO/MMC controller's SDDAT1 line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) Reading the current configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) ---------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) The current configuration of a pin can be read by using standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) gpiolib function:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) s3c_gpio_getcfg(unsigned int pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) The return value will be from the same set of values which can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) passed to s3c_gpio_cfgpin().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) Configuring a pull-up resistor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) A large proportion of the GPIO pins on the S3C2410 can have weak
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) pull-up resistors enabled. This can be configured by the following
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) function:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) void s3c_gpio_setpull(unsigned int pin, unsigned int to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) Where the to value is S3C_GPIO_PULL_NONE to set the pull-up off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) and S3C_GPIO_PULL_UP to enable the specified pull-up. Any other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) values are currently undefined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) Getting and setting the state of a PIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) --------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) These calls are now implemented by the relevant gpiolib calls, convert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) your board or driver to use gpiolib.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) Getting the IRQ number associated with a PIN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) --------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) A standard gpiolib function can map the given pin number to an IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) number to pass to the IRQ system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) int gpio_to_irq(unsigned int pin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) Note, not all pins have an IRQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) Author
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) -------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) Ben Dooks, 03 October 2004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) Copyright 2004 Ben Dooks, Simtec Electronics
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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