Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) =====================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) Freescale i.MX8 DDR Performance Monitoring Unit (PMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) =====================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) There are no performance counters inside the DRAM controller, so performance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) signals are brought out to the edge of the controller where a set of 4 x 32 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) counters is implemented. This is controlled by the CSV modes programed in counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) control register which causes a large number of PERF signals to be generated.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Selection of the value for each counter is done via the config registers. There
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) is one register for each counter. Counter 0 is special in that it always counts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) “time” and when expired causes a lock on itself and the other counters and an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) interrupt is raised. If any other counter overflows, it continues counting, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) no interrupt is raised.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) The "format" directory describes format of the config (event ID) and config1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) (AXI filtering) fields of the perf_event_attr structure, see /sys/bus/event_source/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) devices/imx8_ddr0/format/. The "events" directory describes the events types
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) hardware supported that can be used with perf tool, see /sys/bus/event_source/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) devices/imx8_ddr0/events/. The "caps" directory describes filter features implemented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) in DDR PMU, see /sys/bus/events_source/devices/imx8_ddr0/caps/.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)     .. code-block:: bash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)         perf stat -a -e imx8_ddr0/cycles/ cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)         perf stat -a -e imx8_ddr0/read/,imx8_ddr0/write/ cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) AXI filtering is only used by CSV modes 0x41 (axid-read) and 0x42 (axid-write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) to count reading or writing matches filter setting. Filter setting is various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) from different DRAM controller implementations, which is distinguished by quirks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) in the driver. You also can dump info from userspace, filter in "caps" directory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) indicates whether PMU supports AXI ID filter or not; enhanced_filter indicates
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) whether PMU supports enhanced AXI ID filter or not. Value 0 for un-supported, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) value 1 for supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * With DDR_CAP_AXI_ID_FILTER quirk(filter: 1, enhanced_filter: 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)   Filter is defined with two configuration parts:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)   --AXI_ID defines AxID matching value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)   --AXI_MASKING defines which bits of AxID are meaningful for the matching.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)       - 0: corresponding bit is masked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)       - 1: corresponding bit is not masked, i.e. used to do the matching.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   AXI_ID and AXI_MASKING are mapped on DPCR1 register in performance counter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)   When non-masked bits are matching corresponding AXI_ID bits then counter is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)   incremented. Perf counter is incremented if::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)         AxID && AXI_MASKING == AXI_ID && AXI_MASKING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)   This filter doesn't support filter different AXI ID for axid-read and axid-write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)   event at the same time as this filter is shared between counters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)   .. code-block:: bash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)       perf stat -a -e imx8_ddr0/axid-read,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)       perf stat -a -e imx8_ddr0/axid-write,axi_mask=0xMMMM,axi_id=0xDDDD/ cmd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)   .. note::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)       axi_mask is inverted in userspace(i.e. set bits are bits to mask), and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)       it will be reverted in driver automatically. so that the user can just specify
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)       axi_id to monitor a specific id, rather than having to specify axi_mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)   .. code-block:: bash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)         perf stat -a -e imx8_ddr0/axid-read,axi_id=0x12/ cmd, which will monitor ARID=0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * With DDR_CAP_AXI_ID_FILTER_ENHANCED quirk(filter: 1, enhanced_filter: 1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)   This is an extension to the DDR_CAP_AXI_ID_FILTER quirk which permits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)   counting the number of bytes (as opposed to the number of bursts) from DDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)   read and write transactions concurrently with another set of data counters.