Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) ======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) HiSilicon SoC uncore Performance Monitoring Unit (PMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) ======================================================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) The HiSilicon SoC chip includes various independent system device PMUs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) such as L3 cache (L3C), Hydra Home Agent (HHA) and DDRC. These PMUs are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) independent and have hardware logic to gather statistics and performance
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) The HiSilicon SoC encapsulates multiple CPU and IO dies. Each CPU cluster
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) (CCL) is made up of 4 cpu cores sharing one L3 cache; each CPU die is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) called Super CPU cluster (SCCL) and is made up of 6 CCLs. Each SCCL has
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) two HHAs (0 - 1) and four DDRCs (0 - 3), respectively.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) HiSilicon SoC uncore PMU driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) -------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Each device PMU has separate registers for event counting, control and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) interrupt, and the PMU driver shall register perf PMU drivers like L3C,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) HHA and DDRC etc. The available events and configuration options shall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) be described in the sysfs, see:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /sys/devices/hisi_sccl{X}_<l3c{Y}/hha{Y}/ddrc{Y}>/, or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /sys/bus/event_source/devices/hisi_sccl{X}_<l3c{Y}/hha{Y}/ddrc{Y}>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) The "perf list" command shall list the available events from sysfs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) Each L3C, HHA and DDRC is registered as a separate PMU with perf. The PMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) name will appear in event listing as hisi_sccl<sccl-id>_module<index-id>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) where "sccl-id" is the identifier of the SCCL and "index-id" is the index of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) e.g. hisi_sccl3_l3c0/rd_hit_cpipe is READ_HIT_CPIPE event of L3C index #0 in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) SCCL ID #3.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) e.g. hisi_sccl1_hha0/rx_operations is RX_OPERATIONS event of HHA index #0 in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) SCCL ID #1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) The driver also provides a "cpumask" sysfs attribute, which shows the CPU core
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) ID used to count the uncore PMU event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) Example usage of perf::
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)   $# perf list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)   hisi_sccl3_l3c0/rd_hit_cpipe/ [kernel PMU event]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)   ------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)   hisi_sccl3_l3c0/wr_hit_cpipe/ [kernel PMU event]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)   ------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)   hisi_sccl1_l3c0/rd_hit_cpipe/ [kernel PMU event]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)   ------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)   hisi_sccl1_l3c0/wr_hit_cpipe/ [kernel PMU event]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)   ------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)   $# perf stat -a -e hisi_sccl3_l3c0/rd_hit_cpipe/ sleep 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)   $# perf stat -a -e hisi_sccl3_l3c0/config=0x02/ sleep 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) The current driver does not support sampling. So "perf record" is unsupported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) Also attach to a task is unsupported as the events are all uncore.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) Note: Please contact the maintainer for a complete list of events supported for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) the PMU devices in the SoC and its information if needed.