Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) What:		/sys/bus/iio/devices/iio:deviceX/pll2_feedback_clk_present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) What:		/sys/bus/iio/devices/iio:deviceX/pll2_reference_clk_present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) What:		/sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_a_present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) What:		/sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_b_present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) What:		/sys/bus/iio/devices/iio:deviceX/pll1_reference_clk_test_present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) What:		/sys/bus/iio/devices/iio:deviceX/vcxo_clk_present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) KernelVersion:	3.4.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) Contact:	linux-iio@vger.kernel.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) Description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 		Reading returns either '1' or '0'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 		'1' means that the clock in question is present.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 		'0' means that the clock is missing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) What:		/sys/bus/iio/devices/iio:deviceX/pllY_locked
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) KernelVersion:	3.4.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Contact:	linux-iio@vger.kernel.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 		Reading returns either '1' or '0'. '1' means that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 		pllY is locked.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) What:		/sys/bus/iio/devices/iio:deviceX/sync_dividers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) KernelVersion:	3.4.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) Contact:	linux-iio@vger.kernel.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) Description:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 		Writing '1' triggers the clock distribution synchronization
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		functionality. All dividers are reset and the channels start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 		with their predefined phase offsets (out_altvoltageY_phase).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 		Writing this file has the effect as driving the external
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		/SYNC pin low.