^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) What: /sys/bus/platform/drivers/aspeed-vuart/*/lpc_address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Date: April 2017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) Contact: Jeremy Kerr <jk@ozlabs.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) Description: Configures which IO port the host side of the UART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) will appear on the host <-> BMC LPC bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) Users: OpenBMC. Proposed changes should be mailed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) openbmc@lists.ozlabs.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) Date: April 2017
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) Contact: Jeremy Kerr <jk@ozlabs.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Description: Configures which interrupt number the host side of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) the UART will appear on the host <-> BMC LPC bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Users: OpenBMC. Proposed changes should be mailed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) openbmc@lists.ozlabs.org
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) What: /sys/bus/platform/drivers/aspeed-vuart/*/sirq_polarity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) Date: July 2019
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) Contact: Oskar Senft <osk@google.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) Description: Configures the polarity of the serial interrupt to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) host via the BMC LPC bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) Set to 0 for active-low or 1 for active-high.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) Users: OpenBMC. Proposed changes should be mailed to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) openbmc@lists.ozlabs.org