Math Processor Unit Library

af4d4942 (kx 2024-12-30 12:16:19 +0300  1) .\" Copyright 2024 Andrew V.Kosteltsev (kx@radix-linux.su)
af4d4942 (kx 2024-12-30 12:16:19 +0300  2) .\"
af4d4942 (kx 2024-12-30 12:16:19 +0300  3) .\"
af4d4942 (kx 2024-12-30 12:16:19 +0300  4) .TH shifts\-n 3  "December 27, 2024" "libmpu" "LibMPU Programmer's Manual"
af4d4942 (kx 2024-12-30 12:16:19 +0300  5) .SH NAME
af4d4942 (kx 2024-12-30 12:16:19 +0300  6) \fBishln\fP, \fBishrn\fP, \fBisaln\fP, \fBisarn\fP \- Logical and arithmetic shift operations by \fBn\fP bits
af4d4942 (kx 2024-12-30 12:16:19 +0300  7) .SH SYNOPSIS
af4d4942 (kx 2024-12-30 12:16:19 +0300  8) .nf
af4d4942 (kx 2024-12-30 12:16:19 +0300  9) .B #include <libmpu.h>
af4d4942 (kx 2024-12-30 12:16:19 +0300 10) .PP
af4d4942 (kx 2024-12-30 12:16:19 +0300 11) .BI "void ishln( mpu_int *" c ", mpu_int *" a ", unsigned int " ns ", int " nb " );
af4d4942 (kx 2024-12-30 12:16:19 +0300 12) .BI "void ishrn( mpu_int *" c ", mpu_int *" a ", unsigned int " ns ", int " nb " );
af4d4942 (kx 2024-12-30 12:16:19 +0300 13) .BI "void isaln( mpu_int *" c ", mpu_int *" a ", unsigned int " ns ", int " nb " );
af4d4942 (kx 2024-12-30 12:16:19 +0300 14) .BI "void isarn( mpu_int *" c ", mpu_int *" a ", unsigned int " ns ", int " nb " );
af4d4942 (kx 2024-12-30 12:16:19 +0300 15) .fi
af4d4942 (kx 2024-12-30 12:16:19 +0300 16) .SH DESCRIPTION
af4d4942 (kx 2024-12-30 12:16:19 +0300 17) The action of these functions is similar to \fBishl\fP(), \fBishr\fP(), \fBisal\fP(), \fBisar\fP(),
af4d4942 (kx 2024-12-30 12:16:19 +0300 18) except that they shift their operands by the number of bits specified by the \fBns\fP parameter.
af4d4942 (kx 2024-12-30 12:16:19 +0300 19) The state of the carry flag \fBC\fP is determined by the last pushed outward bit.
af4d4942 (kx 2024-12-30 12:16:19 +0300 20) .sp
af4d4942 (kx 2024-12-30 12:16:19 +0300 21) .SH SEE ALSO
af4d4942 (kx 2024-12-30 12:16:19 +0300 22) .BR iadd(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 23) .BR isub(3),
41c271da (kx 2025-01-05 15:42:39 +0300 24) .BR iadc(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 25) .BR isbb(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 26) .BR ishl(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 27) .BR ishr(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 28) .BR isal(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 29) .BR isar(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 30) .BR irol(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 31) .BR iror(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 32) .BR ircl(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 33) .BR ircr(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 34) .BR iroln(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 35) .BR irorn(3),
af4d4942 (kx 2024-12-30 12:16:19 +0300 36) .BR ircln(3),
41c271da (kx 2025-01-05 15:42:39 +0300 37) .BR ircrn(3),
41c271da (kx 2025-01-05 15:42:39 +0300 38) .BR ineg(3),
41c271da (kx 2025-01-05 15:42:39 +0300 39) .BR inot(3),
41c271da (kx 2025-01-05 15:42:39 +0300 40) .BR iand(3),
41c271da (kx 2025-01-05 15:42:39 +0300 41) .BR itest(3),
41c271da (kx 2025-01-05 15:42:39 +0300 42) .BR icmp(3),
41c271da (kx 2025-01-05 15:42:39 +0300 43) .BR ior(3),
41c271da (kx 2025-01-05 15:42:39 +0300 44) .BR ixor(3),
41c271da (kx 2025-01-05 15:42:39 +0300 45) .BR iinc(3),
41c271da (kx 2025-01-05 15:42:39 +0300 46) .BR idec(3),
41c271da (kx 2025-01-05 15:42:39 +0300 47) .BR ixchg(3),
41c271da (kx 2025-01-05 15:42:39 +0300 48) .BR icpy(3),
41c271da (kx 2025-01-05 15:42:39 +0300 49) .BR icvt(3),
41c271da (kx 2025-01-05 15:42:39 +0300 50) .BR imul(3),
41c271da (kx 2025-01-05 15:42:39 +0300 51) .BR ismul(3),
41c271da (kx 2025-01-05 15:42:39 +0300 52) .BR idiv(3),
41c271da (kx 2025-01-05 15:42:39 +0300 53) .BR isdiv(3),
41c271da (kx 2025-01-05 15:42:39 +0300 54) .BR iatoi(3),
41c271da (kx 2025-01-05 15:42:39 +0300 55) .BR iatoui(3),
41c271da (kx 2025-01-05 15:42:39 +0300 56) .BR iitoa(3),
41c271da (kx 2025-01-05 15:42:39 +0300 57) .BR iuitoa(3).